About the speaker: Wang Minzhi, who has worked in many scientific research institutes and has been engaged in research and development work in radar, communications and medical electronics. Participated in the research and development of many types of shipborne radars, mainly responsible for the development of digital circuits. The current research directions are digital medical development, digital signal processing part of PET and TDC implementation based on FPGA. His work "In-depth Understanding of Altera FPGA Application Design" is highly praised by engineers and has a good reputation.
In traditional audio playback systems, amplifiers are closed-loop and their total harmonic distortion is generally as low as 0.01% or even lower, while electro-acoustic devices are open-loop and their
The project requires me to learn FPGA. I have been exposed to Verilog in school before. I have no memory of it. I have been using C since I started working. I have learned Java and web programming for
The 125KHZ RFID reader I made can read everything fine when the crystal frequency is 11.0592MHz, but when I increase the crystal frequency to 18.432MHz, it can no longer read. I really want to ask for
[i=s] This post was last edited by lw3968 on 2014-9-25 21:08 [/i] [size=5] I recently learned ucos and made a slight change to the code in the book, but there was no multi-tasking (confused): The code