fpga system design practice

FPGA system design practice video tutorial

• Chapter 1：Integrated Circuits and FPGA_Introduction to the Integrated Circuit Industry (14 minutes and 16 seconds)

• Chapter 2：Integrated Circuits and FPGA_Introduction to Semiconductors (10 minutes and 44 seconds)

• Chapter 3：Integrated circuits and FPGA_Introduction to transistors (13 minutes and 10 seconds)

• Chapter 4：Integrated circuit and FPGA_Logic gate implementation (14 minutes and 37 seconds)

• Chapter 5：Integrated circuits and FPGA_Integrated circuit design process (15 minutes and 40 seconds)

• Chapter 6：Introduction to FPGA_Overview of FPGA development (14 minutes and 39 seconds)

• Chapter 7：Introduction to FPGA_Principles of FPGA (15 minutes and 2 seconds)

• Chapter 8：Introduction to FPGA_FPGA circuit design process (15 minutes and 3 seconds)

• Chapter 9：Introduction to FPGA_Introduction to Hardware Description Language (12 minutes and 15 seconds)

• Chapter 10：Introduction to FPGA_Microprocessor and FPGA (12 minutes and 41 seconds)

• Chapter 11：Quartus tool usage_Quartus introduction (12 minutes and 40 seconds)

• Chapter 12：Quartus tool usage_Quartus first experience (16 minutes and 37 seconds)

• Chapter 13：Using Quartus Tools_Waveform Simulation and Verification (13 minutes and 3 seconds)

• Chapter 14：Quartus tool uses _ripple carry adder implementation (17 minutes and 30 seconds)

• Chapter 15：Quartus tool usage_ripple carry adder simulation and verification (10 minutes and 13 seconds)

• Chapter 16：Introduction to Verilog Hardware Description Language (I)_Introduction to Verilog (13 minutes and 18 seconds)

• Chapter 17：Introduction to Verilog Hardware Description Language (I)_Verilog Grammar Vocabulary (16 minutes and 43 seconds)

• Chapter 18：Introduction to Verilog Hardware Description Language (I)_Verilog data objects and types (15 minutes and 37 seconds)

• Chapter 19：Introduction to Verilog Hardware Description Language (I)_Module Concept (10 minutes and 58 seconds)

• Chapter 20：Introduction to Verilog Hardware Description Language (I)_Logic Gate Hierarchical Model (12 minutes and 39 seconds)

• Chapter 21：Introduction to Verilog Hardware Description Language (II)_Logic Gate Hierarchical Model Internship (18 minutes and 7 seconds)

• Chapter 22：Introduction to Verilog Hardware Description Language (II)_Structural Model (14 minutes and 41 seconds)

• Chapter 23：Introduction to Verilog Hardware Description Language (II)_Structural Model Example (14 minutes and 34 seconds)

• Chapter 24：Introduction to Verilog Hardware Description Language (II)_Data Processing Model (9 minutes and 2 seconds)

• Chapter 25：Introduction to Verilog Hardware Description Language (II)_Operation Expression (Part 1) (9 minutes and 37 seconds)

• Chapter 26：Introduction to Verilog Hardware Description Language (II)_Operation Expression (Part 2) (15 minutes and 15 seconds)

• Chapter 27：Introduction to Verilog Hardware Description Language (II)_Operation Expression (Part 2) (14 minutes and 1 seconds)

• Chapter 28：Introduction to Verilog Hardware Description Language (III)_Behavior Description Model (Part 1) (13 minutes and 47 seconds)

• Chapter 29：Introduction to Verilog Hardware Description Language (III)_Behavior Description Model (Part 2) (17 minutes and 8 seconds)

• Chapter 30：Introduction to Verilog Hardware Description Language (III)_Conditional Description (9 minutes and 7 seconds)

• Chapter 31：Introduction to Verilog Hardware Description Language (III)_Multiple Branch Description (8 minutes and 51 seconds)

• Chapter 32：Introduction to Verilog Hardware Description Language (III)_Loop Narration (14 minutes and 54 seconds)

• Chapter 33：Introduction to Verilog Hardware Description Language (III)_Functions and Tasks (20 minutes and 22 seconds)

• Chapter 34：Combinational logic circuit implementation (I)_Introduction to combinational logic circuits (13 minutes and 41 seconds)

• Chapter 35：Combinational Logic Circuit Implementation (I)_ Combinational Logic Circuit Example (12 minutes and 9 seconds)

• Chapter 36：Combinational Logic Circuit Implementation (I)_Carry Store Adder Design (17 minutes and 9 seconds)

• Chapter 37：Combinational Logic Circuit Implementation (I)_Carry Store Adder Implementation (Part 1) (13 minutes and 15 seconds)

• Chapter 38：Combinational Logic Circuit Implementation (I)_Carry Store Adder Implementation (Part 2) (25 minutes and 55 seconds)

• Chapter 39：Combinational Logic Circuit Implementation (II)_Multiplexer Implementation (19 minutes and 50 seconds)

• Chapter 40：Combinational Logic Circuit Implementation (II)_ Comparator Implementation (12 minutes and 39 seconds)

• Chapter 41：Combinational Logic Circuit Implementation (II)_Decoder Implementation (12 minutes and 48 seconds)

• Chapter 42：Combinational Logic Circuit Implementation (II)_Encoder Implementation (19 minutes and 25 seconds)

• Chapter 43：Combinational logic circuit implementation (II)_Seven-segment display internship (Part 1) (15 minutes and 11 seconds)

• Chapter 44：Combinational logic circuit implementation (II)_Seven-segment display internship (Part 2) (16 minutes and 12 seconds)

• Chapter 45：Implementation of Sequential Logic Circuits (I)_Introduction to Sequential Logic Circuits (13 minutes and 3 seconds)

• Chapter 46：Implementation of Sequential Logic Circuit (I)_Comparison of Latch and Flip-Flop (14 minutes and 4 seconds)

• Chapter 47：Sequential Logic Circuit Implementation (I)_Latch Implementation (15 minutes and 18 seconds)

• Chapter 48：Sequential logic circuit implementation (I)_Flip-flop implementation (25 minutes and 44 seconds)

• Chapter 49：Sequential Logic Circuit Implementation (I)_Blocking and Nonblocking (18 minutes and 20 seconds)

• Chapter 50：Sequential Logic Circuit Implementation (II)_Counter Implementation (14 minutes and 14 seconds)

• Chapter 51：Sequential Logic Circuit Implementation (II)_Counter Display (9 minutes and 48 seconds)

• Chapter 52：Sequential Logic Circuit Implementation (II)_Frequency Divider Implementation (14 minutes and 57 seconds)

• Chapter 53：Sequential Logic Circuit Implementation (II)_Shift Register Implementation (Part 1) (11 minutes and 26 seconds)

• Chapter 54：Sequential Logic Circuit Implementation (II)_Shift Register Implementation (Part 2) (11 minutes and 57 seconds)

• Chapter 55：Sequential Logic Circuit Implementation (III)_Bounce Circuit Removal (13 minutes and 1 seconds)

• Chapter 56：Implementation of Sequential Logic Circuit (III)_Removal of Bounce Circuit (17 minutes and 19 seconds)

• Chapter 57：Sequential Logic Circuit Implementation (III)_Counting Display Practice (Part 1) (13 minutes and 17 seconds)

• Chapter 58：Sequential Logic Circuit Implementation (III)_Counting Display Practice (Part 2) (9 minutes and 31 seconds)

• Chapter 59：Sequential Logic Circuit Implementation (III)_Pulse Width Modulation Practice (Part 1) (11 minutes and 8 seconds)

• Chapter 60：Sequential Logic Circuit Implementation (III)_Pulse Width Modulation Practice (Part 2) (6 minutes and 36 seconds)

• Chapter 61：Test file writing and simulation_Test file introduction (20 minutes and 15 seconds)

• Chapter 62：Test file writing and simulation_Test file example 1 (16 minutes and 39 seconds)

• Chapter 63：Test file writing and simulation_Execute test file (13 minutes and 8 seconds)

• Chapter 64：Test file writing and simulation_Test file example 2 (12 minutes and 42 seconds)

• Chapter 65：Test file writing and simulation_sequential circuit test file example (18 minutes and 51 seconds)

• Chapter 66：Writing and Simulating Test Files_Automatic Comparison of Test Files (18 minutes and 19 seconds)

• Chapter 67：Control unit_Control unit introduction (16 minutes and 15 seconds)

• Chapter 68：Control unit_state machine implementation (17 minutes and 11 seconds)

• Chapter 69：Control unit_button switch light example (15 minutes and 1 seconds)

• Chapter 70：Control unit_ Flashing light practice (Part 1) (18 minutes and 26 seconds)

• Chapter 71：Control Unit_Flashing Light Practice (Part 2) (15 minutes and 23 seconds)

• Chapter 72：Data operation unit (I)_Introduction to data operation unit (15 minutes and 16 seconds)

• Chapter 73：Data Operation Unit (I)_Data Operation Unit Example (Part 1) (28 minutes and 42 seconds)

• Chapter 74：Data operation unit (I)_data operation unit example (middle) (10 minutes and 36 seconds)

• Chapter 75：Data operation unit (I)_Data operation unit example (Part 2) (15 minutes and 23 seconds)

• Chapter 76：Data operation unit (II)_register file (16 minutes and 12 seconds)

• Chapter 77：Data operation unit (II)_memory (23 minutes and 55 seconds)

• Chapter 78：Data operation unit (II)_clock cycle and frequency (15 minutes and 31 seconds)

• Chapter 79：Data operation unit (II)_time limit (28 minutes and 53 seconds)

• Chapter 80：Data operation unit (II)_pipeline architecture (20 minutes and 37 seconds)

• Chapter 81：System Design Methods_Introduction to Digital System Design (16 minutes and 26 seconds)

• Chapter 82：System Design Method_Simple Vending Machine (Part 1) (18 minutes and 41 seconds)

• Chapter 83：System Design Method_Simple Vending Machine (Part 2) (17 minutes and 2 seconds)

• Chapter 84：System Design Method_Simple Vending Machine (Part 2) (21 minutes and 30 seconds)

• Chapter 85：System Design Example_Servo Motor Control (12 minutes and 24 seconds)

• Chapter 86：System Design Example_Servo Motor Control Example (Part 1) (11 minutes and 2 seconds)

• Chapter 87：System Design Example_Servo Motor Control Example (Part 2) (15 minutes and 21 seconds)

• Chapter 88：System Design Example_Servo Motor Control Example Display (9 minutes and 10 seconds)