Training
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WildFire FPGA Verilog Development Practice Guide - Based on Intel Cyclone IV
Chapters
Chapter 1：Introduction to the ZT series development boards and supporting tutorials (31 minutes and 46 seconds)
Chapter 2：Getting Started with FPGA (26 minutes and 13 seconds)
Chapter 3：Building an FPGA development environment (28 minutes and 16 seconds)
Chapter 4：First Look at Verilog (30 minutes and 1 seconds)
Chapter 5：Light up your LED lights (34 minutes and 38 seconds)
Chapter 6：Simple combinational logic---multiplexer (I) (21 minutes and 9 seconds)
Chapter 7：Simple Combinational Logic---Multiplexer (Part 2) (28 minutes and 20 seconds)
Chapter 8：Simple combinational logic---decoder (38 minutes and 21 seconds)
Chapter 9：Simple combinational logic---half adder (27 minutes and 7 seconds)
Chapter 10：Hierarchical design (38 minutes and 28 seconds)
Chapter 11：Avoid latching (15 minutes and 37 seconds)
Chapter 12：The beginning of sequential logic --- register (I) (21 minutes and 9 seconds)
Chapter 13：The Beginning of Sequential Logic --- Registers (II) (21 minutes and 10 seconds)
Chapter 14：Blocking and non-blocking assignments (24 minutes and 26 seconds)
Chapter 15：Counter (I) (33 minutes and 12 seconds)
Chapter 16：Counter (II) (32 minutes and 38 seconds)
Chapter 17：Frequency divider---even frequency divider (36 minutes and 5 seconds)
Chapter 18：Frequency divider---odd frequency divider (34 minutes and 29 seconds)
Chapter 19：Key debounce (I) (20 minutes and 6 seconds)
Chapter 20：Key debounce (Part 2) (22 minutes and 40 seconds)
Chapter 21：Touch button to control LED light (34 minutes and 28 seconds)
Chapter 22：Flowing lights (35 minutes and 1 seconds)
Chapter 23：Breathing light (1) (27 minutes and 9 seconds)
Chapter 24：Breathing Light (II) (26 minutes and 11 seconds)
Chapter 25：State Machine (I) (29 minutes and 39 seconds)
Chapter 26：State Machine (II) (31 minutes and 15 seconds)
Chapter 27：State Machine (III) (29 minutes and 35 seconds)
Chapter 28：State Machine (IV) (35 minutes and 22 seconds)
Chapter 29：Passive buzzer driving experiment (I) (25 minutes and 13 seconds)
Chapter 30：Passive buzzer driving experiment (II) (28 minutes and 26 seconds)
Chapter 31：Digital tube static display (I) (23 minutes and 24 seconds)
Chapter 32：Digital tube static display (II) (30 minutes and 41 seconds)
Chapter 33：Digital tube static display (Part 3) (35 minutes and 14 seconds)
Chapter 34：Digital tube dynamic display (I) (18 minutes and 53 seconds)
Chapter 35：Digital tube dynamic display (II) (28 minutes and 35 seconds)
Chapter 36：Digital tube dynamic display (Part 3) (33 minutes and 31 seconds)
Chapter 37：Digital tube dynamic display (IV) (24 minutes and 27 seconds)
Chapter 38：Digital tube dynamic display (V) (26 minutes and 3 seconds)
Chapter 39：Digital tube dynamic display (VI) (38 minutes and 11 seconds)
Chapter 40：Digital tube dynamic display (VII) (23 minutes and 53 seconds)
Chapter 41：The magic weapon for rapid development - IP core (18 minutes and 16 seconds)
Chapter 42：Calling PLL-IP core (I) (13 minutes and 13 seconds)
Chapter 43：Calling the PLL-IP core (Part 2) (22 minutes and 9 seconds)
Chapter 44：Calling the PLL-IP core (Part 3) (18 minutes and 7 seconds)
Chapter 45：Calling the PLL-IP core (IV) (31 minutes and 8 seconds)
Chapter 46：Calling ROM-IP core (I) (13 minutes and 55 seconds)
Chapter 47：Calling ROM-IP core (Part 2) (20 minutes and 14 seconds)
Chapter 48：Calling ROM-IP core (Part 3) (12 minutes and 24 seconds)
Chapter 49：Calling ROM-IP core (IV) (17 minutes and 46 seconds)
Chapter 50：Calling ROM-IP core (V) (22 minutes and 4 seconds)
Chapter 51：Calling ROM-IP core (VI) (15 minutes and 50 seconds)
Chapter 52：Calling ROM-IP core (VII) (23 minutes and 35 seconds)
Chapter 53：Calling ROM-IP core (VIII) (30 minutes and 20 seconds)
Chapter 54：RAM-IP core call (I) (18 minutes and 42 seconds)
Chapter 55：RAM-IP core call (Part 2) (21 minutes and 9 seconds)
Chapter 56：RAM-IP core call (Part 3) (18 minutes and 11 seconds)
Chapter 57：RAM-IP core call (IV) (22 minutes and 11 seconds)
Chapter 58：RAM-IP core call (V) (19 minutes and 19 seconds)
Chapter 59：RAM-IP core call (VI) (31 minutes and 54 seconds)
Chapter 60：RAM-IP core call (VII) (33 minutes and 28 seconds)
Chapter 61：FIFO-IP core call (I) (16 minutes and 39 seconds)
Chapter 62：FIFO-IP core call (Part 2) (14 minutes and 51 seconds)
Chapter 63：FIFO-IP core call (Part 3) (17 minutes and 7 seconds)
Chapter 64：FIFO-IP core call (IV) (15 minutes and 37 seconds)
Chapter 65：FIFO-IP core call (V) (29 minutes and 23 seconds)
Chapter 66：VGA display driver design and verification (I) (22 minutes and 36 seconds)
Chapter 67：VGA display driver design and verification (Part 2) (14 minutes and 47 seconds)
Chapter 68：VGA display driver design and verification (Part 3) (21 minutes and 45 seconds)
Chapter 69：VGA display driver design and verification (IV) (28 minutes and 12 seconds)
Chapter 70：VGA display driver design and verification (V) (16 minutes and 18 seconds)
Chapter 71：VGA display driver design and verification (VI) (17 minutes and 17 seconds)
Chapter 72：VGA display driver design and verification (Part 7) (22 minutes and 37 seconds)
Chapter 73：VGA display driver design and verification (VIII) (22 minutes and 35 seconds)
Chapter 74：VGA display driver design and verification (Part 9) (14 minutes and 37 seconds)
Chapter 75：VGA monitor character display (I) (17 minutes and 23 seconds)
Chapter 76：VGA monitor character display (Part 2) (19 minutes and 41 seconds)
Chapter 77：VGA monitor character display (Part 3) (19 minutes and 52 seconds)
Chapter 78：VGA monitor character display (IV) (15 minutes and 35 seconds)
Chapter 79：Serial port RS232 (I) (19 minutes and 14 seconds)
Chapter 80：Serial port RS232 (two) (17 minutes and 29 seconds)
Chapter 81：Serial port RS232 (three) (18 minutes and 59 seconds)
Chapter 82：Serial port RS232 (four) (20 minutes and 56 seconds)
Chapter 83：Serial port RS232 (five) (24 minutes and 44 seconds)
Chapter 84：Serial port RS232 (vi) (23 minutes and 9 seconds)
Chapter 85：Serial port RS232 (seven) (17 minutes and 57 seconds)
Chapter 86：Serial port RS232 (eight) (14 minutes and 52 seconds)
Chapter 87：Serial port RS232 (nine) (21 minutes and 7 seconds)
Chapter 88：Serial port RS232 (ten) (25 minutes and 58 seconds)
Chapter 89：In-circuit debugging using the SignalTap II embedded logic analyzer (Part 1) (12 minutes and 18 seconds)
Chapter 90：In-circuit debugging using the SignalTap II embedded logic analyzer (Part 2) (28 minutes and 43 seconds)
Chapter 91：Serial port RS485 (I) (14 minutes and 47 seconds)
Chapter 92：Serial port RS485 (II) (18 minutes and 25 seconds)
Chapter 93：Serial port RS485 (three) (22 minutes and 5 seconds)
Chapter 94：Serial port RS485 (four) (20 minutes and 32 seconds)
Chapter 95：Serial port RS485 (five) (16 minutes and 56 seconds)
Chapter 96：Serial port RS485 (vi) (35 minutes and 48 seconds)
Chapter 97：Design and verification of a simple frequency meter (I) (22 minutes and 43 seconds)
Chapter 98：Design and verification of a simple frequency meter (Part 2) (16 minutes and 32 seconds)
Chapter 99：Design and verification of a simple frequency meter (Part 3) (30 minutes and 0 seconds)
Chapter 100：Design and verification of a simple frequency meter (IV) (33 minutes and 12 seconds)
Chapter 101：Design and verification of a simple frequency meter (V) (29 minutes and 52 seconds)
Chapter 102：Design and verification of a simple frequency meter (VI) (22 minutes and 23 seconds)
Chapter 103：Design and verification of a simple DDS signal generator (Part 1) (27 minutes and 57 seconds)
Chapter 104：Design and verification of a simple DDS signal generator (Part 2) (24 minutes and 46 seconds)
Chapter 105：Design and verification of a simple DDS signal generator (Part 3) (23 minutes and 5 seconds)
Chapter 106：Design and verification of a simple DDS signal generator (Part 4) (25 minutes and 27 seconds)
Chapter 107：Design and verification of a simple DDS signal generator (Part 5) (20 minutes and 20 seconds)
Chapter 108：Design and verification of a simple voltmeter (I) (13 minutes and 26 seconds)
Chapter 109：Design and verification of a simple voltmeter (Part 2) (20 minutes and 43 seconds)
Chapter 110：Design and verification of a simple voltmeter (Part 3) (21 minutes and 31 seconds)
Chapter 111：Design and verification of a simple voltmeter (IV) (22 minutes and 32 seconds)
Chapter 112：Infrared remote control (I) (27 minutes and 30 seconds)
Chapter 113：Infrared remote control (II) (31 minutes and 58 seconds)
Chapter 114：Infrared remote control (Part 3) (26 minutes and 38 seconds)
Chapter 115：Infrared remote control (IV) (44 minutes and 10 seconds)
Chapter 116：Infrared remote control (V) (26 minutes and 24 seconds)
Chapter 117：Infrared remote control (VI) (25 minutes and 2 seconds)
Chapter 118：Infrared remote control (VII) (20 minutes and 11 seconds)
Chapter 119：DS18B20 digital temperature sensor (I) (29 minutes and 8 seconds)
Chapter 120：DS18B20 Digital Temperature Sensor (Part 2) (16 minutes and 28 seconds)
Chapter 121：DS18B20 Digital Temperature Sensor (Part 3) (25 minutes and 53 seconds)
Chapter 122：DS18B20 Digital Temperature Sensor (IV) (25 minutes and 36 seconds)
Chapter 123：DS18B20 Digital Temperature Sensor (V) (17 minutes and 23 seconds)
Chapter 124：DS18B20 Digital Temperature Sensor (VI) (30 minutes and 3 seconds)
Chapter 125：DS18B20 Digital Temperature Sensor (Part 7) (26 minutes and 10 seconds)
Chapter 126：DS18B20 Digital Temperature Sensor (VIII) (20 minutes and 0 seconds)
Chapter 127：DS18B20 Digital Temperature Sensor (Part 9) (26 minutes and 39 seconds)
Chapter 128：DHT11 digital temperature and humidity sensor (I) (26 minutes and 18 seconds)
Chapter 129：DHT11 digital temperature and humidity sensor (Part 2) (14 minutes and 18 seconds)
Chapter 130：DHT11 digital temperature and humidity sensor (Part 3) (40 minutes and 15 seconds)
Chapter 131：DHT11 digital temperature and humidity sensor (IV) (19 minutes and 51 seconds)
Chapter 132：DHT11 digital temperature and humidity sensor (V) (26 minutes and 59 seconds)
Chapter 133：DHT11 digital temperature and humidity sensor (VI) (23 minutes and 55 seconds)
Chapter 134：ROM-based VGA image display (I) (22 minutes and 26 seconds)
Chapter 135：VGA image display based on ROM (Part 2) (28 minutes and 59 seconds)
Chapter 136：VGA image display based on ROM (Part 3) (19 minutes and 11 seconds)
Chapter 137：VGA image display based on ROM (bounce effect) (I) (15 minutes and 50 seconds)
Chapter 138：VGA image display based on ROM (bounce effect) (Part 2) (25 minutes and 27 seconds)
Chapter 139：VGA image display based on ROM (bounce effect) (Part 3) (18 minutes and 22 seconds)
Chapter 140：VGA image display based on ROM (bounce effect) (Part 4) (17 minutes and 24 seconds)
Chapter 141：VGA image display based on RS232 (I) (13 minutes and 12 seconds)
Chapter 142：VGA image display based on RS232 (Part 2) (17 minutes and 51 seconds)
Chapter 143：VGA image display based on RS232 (Part 3) (21 minutes and 51 seconds)
Chapter 144：VGA image display based on RS232 (Part 4) (31 minutes and 36 seconds)
Chapter 145：HDMI display driver design and verification (I) (25 minutes and 57 seconds)
Chapter 146：HDMI display driver design and verification (Part 2) (27 minutes and 55 seconds)
Chapter 147：HDMI display driver design and verification (Part 3) (17 minutes and 49 seconds)
Chapter 148：HDMI display driver design and verification (Part 4) (18 minutes and 38 seconds)
Chapter 149：HDMI display driver design and verification (V) (19 minutes and 7 seconds)
Chapter 150：HDMI display driver design and verification (VI) (17 minutes and 49 seconds)
Chapter 151：HDMI display driver design and verification (Part 7) (19 minutes and 44 seconds)
Chapter 152：HDMI display driver design and verification (VIII) (28 minutes and 27 seconds)
Chapter 153：HDMI display driver design and verification (Part 9) (28 minutes and 54 seconds)
Chapter 154：HDMI display driver design and verification (10) (33 minutes and 51 seconds)
Chapter 155：TFT_LCD liquid crystal screen driver design and verification (I) (13 minutes and 11 seconds)
Chapter 156：TFT_LCD liquid crystal screen driver design and verification (Part 2) (28 minutes and 52 seconds)
Chapter 157：TFT_LCD liquid crystal screen driver design and verification (Part 3) (16 minutes and 17 seconds)
Chapter 158：TFT_LCD liquid crystal screen character display (25 minutes and 43 seconds)
Chapter 159：FIFO summing experiment (I) (21 minutes and 27 seconds)
Chapter 160：FIFO summing experiment (II) (15 minutes and 0 seconds)
Chapter 161：FIFO summing experiment (III) (28 minutes and 39 seconds)
Chapter 162：FIFO summing experiment (IV) (26 minutes and 6 seconds)
Chapter 163：FIFO summing experiment (V) (27 minutes and 18 seconds)
Chapter 164：Design and implementation of edge detection based on Sobel algorithm (I) (24 minutes and 50 seconds)
Chapter 165：Design and implementation of edge detection based on Sobel algorithm (Part 2) (38 minutes and 19 seconds)
Chapter 166：Design and implementation of edge detection based on Sobel algorithm (Part 3) (31 minutes and 33 seconds)
Chapter 167：Design and implementation of edge detection based on Sobel algorithm (Part 4) (42 minutes and 57 seconds)
Chapter 168：Flash drive control based on SPI protocol (theoretical learning) (30 minutes and 6 seconds)
Chapter 169：Flash drive control based on SPI protocol (full erase (I)) (34 minutes and 15 seconds)
Chapter 170：Flash drive control based on SPI protocol (full erase (Part 2)) (20 minutes and 38 seconds)
Chapter 171：Flash drive control based on SPI protocol (full erase (Part 3)) (21 minutes and 5 seconds)
Chapter 172：Flash drive control based on SPI protocol (full erase (IV)) (25 minutes and 30 seconds)
Chapter 173：Flash drive control based on SPI protocol (full erase (V)) (22 minutes and 43 seconds)
Chapter 174：Flash drive control based on SPI protocol (full erase (VI)) (31 minutes and 22 seconds)
Chapter 175：Flash drive control based on SPI protocol (sector erase (I)) (29 minutes and 43 seconds)
Chapter 176：Flash drive control based on SPI protocol (sector erase (II)) (22 minutes and 9 seconds)
Chapter 177：Flash drive control based on SPI protocol (data read operation (I)) (12 minutes and 53 seconds)
Chapter 178：Flash drive control based on SPI protocol (data read operation (II)) (28 minutes and 51 seconds)
Chapter 179：Flash drive control based on SPI protocol (data read operation (III)) (32 minutes and 18 seconds)
Chapter 180：Flash drive control based on SPI protocol (data read operation (IV)) (29 minutes and 15 seconds)
Chapter 181：Flash drive control based on SPI protocol (data read operation (V)) (30 minutes and 37 seconds)
Chapter 182：Flash drive control based on SPI protocol (data read operation (VI)) (31 minutes and 7 seconds)
Chapter 183：Flash drive control based on SPI protocol (data read operation (VII)) (16 minutes and 23 seconds)
Chapter 184：Flash driver control based on SPI protocol (page write operation (I)) (18 minutes and 25 seconds)
Chapter 185：Flash drive control based on SPI protocol (page write operation (II)) (15 minutes and 30 seconds)
Chapter 186：Flash drive control based on SPI protocol (page write operation (III)) (30 minutes and 25 seconds)
Chapter 187：Flash drive control based on SPI protocol (page write operation (IV)) (34 minutes and 18 seconds)
Chapter 188：Flash drive control based on SPI protocol (continuous write operation (I)) (35 minutes and 15 seconds)
Chapter 189：Flash drive control based on SPI protocol (continuous write operation (II)) (29 minutes and 12 seconds)
Chapter 190：EEPROM drive control based on I2C protocol (I) (39 minutes and 10 seconds)
Chapter 191：EEPROM drive control based on I2C protocol (Part 2) (24 minutes and 26 seconds)
Chapter 192：EEPROM drive control based on I2C protocol (Part 3) (17 minutes and 4 seconds)
Chapter 193：EEPROM drive control based on I2C protocol (IV) (33 minutes and 31 seconds)
Chapter 194：EEPROM drive control based on I2C protocol (V) (34 minutes and 21 seconds)
Chapter 195：EEPROM drive control based on I2C protocol (VI) (42 minutes and 44 seconds)
Chapter 196：EEPROM drive control based on I2C protocol (Part 7) (46 minutes and 47 seconds)
Chapter 197：EEPROM drive control based on I2C protocol (VIII) (19 minutes and 33 seconds)
Chapter 198：EEPROM drive control based on I2C protocol (Part 9) (29 minutes and 44 seconds)
Chapter 199：EEPROM drive control based on I2C protocol (10) (25 minutes and 35 seconds)
Chapter 200：EEPROM drive control based on I2C protocol (XI) (21 minutes and 46 seconds)
Chapter 201：EEPROM drive control based on I2C protocol (12) (23 minutes and 12 seconds)
Chapter 202：EEPROM drive control based on I2C protocol (Thirteen) (41 minutes and 53 seconds)
Chapter 203：Design and verification of SDRAM read/write controller (theoretical study (I)) (22 minutes and 58 seconds)
Chapter 204：Design and verification of SDRAM read-write controller (theoretical study (II)) (18 minutes and 40 seconds)
Chapter 205：Design and verification of SDRAM read-write controller (theoretical study (III)) (22 minutes and 49 seconds)
Chapter 206：Design and verification of SDRAM read-write controller (theoretical study (IV)) (16 minutes and 34 seconds)
Chapter 207：Design and verification of SDRAM read/write controller (block diagram drawing (I)) (23 minutes and 24 seconds)
Chapter 208：Design and verification of SDRAM read/write controller (block diagram drawing (II)) (23 minutes and 28 seconds)
Chapter 209：Design and verification of SDRAM read/write controller (SDRAM initialization (I)) (37 minutes and 22 seconds)
Chapter 210：Design and Verification of SDRAM Reader and Write Controller (SDRAM Initialization (II)) (21 minutes and 36 seconds)
Chapter 211：Design and verification of SDRAM read/write controller (SDRAM initialization (III)) (23 minutes and 10 seconds)
Chapter 212：Design and verification of SDRAM read/write controller (SDRAM initialization (IV)) (32 minutes and 12 seconds)
Chapter 213：Design and Verification of SDRAM Reader and Write Controller (SDRAM Automatic Refresh (I)) (30 minutes and 42 seconds)
Chapter 214：Design and Verification of SDRAM Reader and Write Controller (SDRAM Automatic Refresh (II)) (34 minutes and 19 seconds)
Chapter 215：Design and verification of SDRAM read/write controller (SDRAM automatic refresh (Part 3)) (20 minutes and 9 seconds)
Chapter 216：Design and verification of SDRAM read/write controller (SDRAM data write operation (I)) (22 minutes and 31 seconds)
Chapter 217：Design and verification of SDRAM read/write controller (SDRAM data write operation (II)) (21 minutes and 32 seconds)
Chapter 218：Design and verification of SDRAM read/write controller (SDRAM data write operation (III)) (27 minutes and 9 seconds)
Chapter 219：Design and verification of SDRAM read/write controller (SDRAM data write operation (IV)) (21 minutes and 11 seconds)
Chapter 220：Design and verification of SDRAM read/write controller (SDRAM data write operation (V)) (30 minutes and 15 seconds)
Chapter 221：Design and verification of SDRAM read/write controller (SDRAM data read operation (I)) (33 minutes and 7 seconds)
Chapter 222：Design and verification of SDRAM read/write controller (SDRAM data read operation (II)) (32 minutes and 10 seconds)
Chapter 223：Design and verification of SDRAM read/write controller (SDRAM data read operation (III)) (28 minutes and 37 seconds)
Chapter 224：Design and Verification of SDRAM Read/Write Controller (SDRAM Arbitration Module (I)) (16 minutes and 37 seconds)
Chapter 225：Design and Verification of SDRAM Read/Write Controller (SDRAM Arbitration Module (II)) (29 minutes and 7 seconds)
Chapter 226：Design and verification of SDRAM read/write controller (SDRAM arbitration module (III)) (24 minutes and 55 seconds)
Chapter 227：Design and verification of SDRAM read/write controller (SDRAM control module (I)) (37 minutes and 2 seconds)
Chapter 228：Design and verification of SDRAM read/write controller (SDRAM control module (II)) (22 minutes and 52 seconds)
Chapter 229：Design and verification of SDRAM read/write controller (FIFO control module (I)) (38 minutes and 56 seconds)
Chapter 230：Design and verification of SDRAM read/write controller (FIFO control module (II)) (36 minutes and 14 seconds)
Chapter 231：Design and verification of SDRAM read/write controller (SDRAM controller top-level module (I)) (24 minutes and 49 seconds)
Chapter 232：Design and verification of SDRAM read/write controller (SDRAM controller top-level module (II)) (28 minutes and 3 seconds)
Chapter 233：Design and verification of SDRAM read/write controller (FIFO read module (I)) (39 minutes and 35 seconds)
Chapter 234：Design and Verification of SDRAM Read/Write Controller (FIFO Read Module (II)) (32 minutes and 11 seconds)
Chapter 235：Design and verification of SDRAM read and write controller (uart_sdram top-level module (I)) (32 minutes and 8 seconds)
Chapter 236：Design and verification of SDRAM read and write controller (uart_sdram top-level module (II)) (29 minutes and 52 seconds)
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