Location:Training / Embedded Development / FPGA / Getting started and improving Vivado (high runner-up) / Logic simulation based on ModelSim (DEMO project file is consistent with Lecture 3)

This course introduces in detail the use of Xilinx's new generation development platform Vivado. It is divided into two parts: introductory part and advanced part; it covers four major topics: design process, timing constraints (XDC), design analysis and the use of Tcl scripts; attached Multiple project demos. The design concept of Vivado "IP Centric" runs through it, and the demo shows the powerful functions of Vivado and the differences from ISE.