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【Digital circuit】Digital electronic clock design

 
Overview

1 Design purpose

(1) Master the design methods of digital electronic clocks;

(2) Master the functions and uses of commonly used digital integrated circuits;

(3) Consolidate the theoretical knowledge of digital circuits and master the drawing methods of logic circuits and truth tables.

2 Functions and requirements of digital clock

(1) Design signal generation circuit, timing circuit, time adjustment circuit, time reporting circuit and display circuit respectively;

(2) Use a digital tube to display the time;

(3) Set the hours, minutes and seconds by pressing the buttons;

(4) Realize the hourly time reporting function, and emit a beeping sound every time the hour comes ( lasts for 5 seconds );

3 System block diagram

       The quartz crystal oscillator and frequency divider produce a stable time correction signal and a "second" timing signal, and the "second" timing signal is counted in base 60 to form a "minute" timing signal and a second count value, and then the "minute" timing is The signal is counted in base 60 to form the "hour" timing signal and minute count value, and then the "hour" timing signal is further counted in base 24 to obtain the hour count value. The second count value, minute count value and hour count value are decoded to display the time. The hourly time chime is completed using a combinational logic circuit.

4 Principle analysis of each part

4.1 Signal generation-quartz crystal oscillator circuit

   The pulse generator is the core part of the digital clock. Its accuracy and stability determine the quality of the digital clock. The pulses emitted by the crystal oscillator are usually shaped and divided to obtain 2Hz second pulses. For example, if the crystal oscillator is 32768 Hz, a 2Hz pulse output can be obtained after dividing the frequency by 14 times.

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4.2 Frequency divider circuit

  Since the frequency generated by the oscillator is very high, to obtain pulses per second, a split-screen circuit is required. This experiment uses a 32768HZ crystal oscillator to generate clock pulses. What the experiment requires is a standard second pulse signal, so 74ls74 is used to divide the frequency by 2 to get the standard 1HZ signal we need.

(3) Counting display part

  The second, minute, hour and day counter circuits all use the medium-scale integrated circuit CD4518 to realize the counting of seconds, minutes and hours. The seconds and minutes are divided into six decimal systems and the hours are in 24 decimal systems. From Figure 3, we can find that the second and minute counters are exactly the same. When the count reaches 59, another pulse changes to 00, and then the count starts again. In the figure, "asynchronous clearing" is used to feed back to the /CR terminal to realize the functions of one-digit decimal and ten-digit hexadecimal. The hour counter is in hexadecimal system. When it starts counting, the ones digit is counted in decimal system. When it reaches 23, another pulse will come and it should return to "zero". Therefore, here it is necessary to make the ones digit not only complete the decimal counting, but also clear the counter when the high and low bits meet the number "23". In the figure, the "2" of the tens digit and the "4" of the ones digit are used. and then reset to zero.

 

 

 

  The counter chip uses CD4518, and the CD4518 driver is a seven-segment decoding driver used in conjunction with the 8421BCD encoding counter. CD4518 is a dual BCD synchronous up counter, consisting of two identical synchronous 4-level counters. CD4518 pin functions (pin functions) are as follows:

1CP:

2CP: Clock input terminal.

1CR, 2CR: Clear end.

1EN, 2EN: Counting enable control terminal.

1Q0~1Q3: Counter output terminal. 2Q0~2Q3: Counter output terminal. Vdd: Positive power supply. Vss: ground.

  CD4518 is a synchronous up counter that contains two interchangeable binary/decimal counters in one package. Its function pins are 1~7 and 9~{15}. The CD4518 counter is a single-channel series pulse input (pin 1 or 2 feet; 9 feet or 10 feet), 4-way BCD code signal output (3 feet to 6; {11} feet to {14} feet). CD4518 control function: CD4518 has two clock input terminals CP and EN. If the rising edge of the clock is used to trigger the signal, the signal is input by CP. At this time, the EN terminal is high level (1). If the falling edge of the clock is used to trigger the signal, the signal is input by EN. This When the CP terminal is low level (0), the reset terminal Cr also remains low (0). Only when these conditions are met, the circuit will be in the counting state. Otherwise, it will not work.

   When several CD4518s are cascaded in series, although each CD4518 counts in parallel, it has become a serial count as a whole. It should be pointed out that CD4518 does not have a carry port, but Q4 can be used as the output port. Someone mistakenly connected the Q4 terminal of the first stage to the CP terminal of the second stage, and found that the count became "every eight counts into one". The reason is that Q4 generates a positive transition under the action of CP8, and its rising edge cannot be used as a carry pulse. Only its falling edge is the carry signal of "tenths to one". The correct connection method should be to connect the low Q4 terminal to the high EN terminal, and the CP terminal of the high counter to USS.

 

(4) Decoding display part

 Decoding refers to the process of translating a given code. CD4511 seven-segment display decoder/decoder IC CD4511 is a set of packages used as BCD to decode common cathode LED seven-segment displays. Its pin diagram is shown in Figure 1 and truth table Figure 2. The functions of each pin are as follows:

LT: Used for light bulb testing. When LT=0, regardless of other input status, its output abcdefg=1111111, making the seven-segment display fully bright, that is, displaying 8, so as to observe whether the seven-segment display is normal; when LT=1, then Decode normally. BI: Blank input control. When BI=0 (when LT is 1), no matter what the input of DCBA is, its output is 0, that is, the seven-segment display is not lit at all. This pin can be controlled by the user to only decode valid data. , to avoid font confusion caused by displaying meaningless data during input. LE: Data latch enable control; in CD4511, it not only has a decoding function, but also has a data latch memory function. When LE=0 (LT=1 and BI=1), the DCBA data will be sent to the IC's register to be saved for the decoder code; when LE=1, the temporary register in the IC will be closed, and only the original data in the IC will be saved. The DCBA data when LE=0 is provided for decoding by the decoder. In other words, when LE=1, no matter what the input data of DCBA is, its output will not be affected, and its output abcdefg will still retain the original transition from 0 to 1 in LE.

truth table
Q4 Q3 Q2 Q1 show
1 0 0 0 day
0 0 0 1 1
0 0 1 0 2
0 0 1 1 3
0 1 0 0 4
0 1 0 1 5
0 1 1 1 6

 

(5) Time correction circuit

      The timing circuit is implemented using buttons. Since it is a circuit built entirely in hardware, it cannot be programmed to eliminate jitter. Here, hardware is used to eliminate jitter. Since during timing, the level is directly given to the CD4518cp terminal, but the cp terminal is connected to On the clearing end of the front stage, the OR gate method is used here. Whether it is the pulse sent from the rear stage or the button, it can pulse the counter to achieve the purpose of calibrating the time.

 

(6) Hourly time chime circuit

    When the time reaches the hour, the clock minute and second minute are both 0 , then the tens digit of the second is 0, and the ones digit is from 0-5 . Here, a four-input NOR gate circuit is first used to convert the tens digit of the minute and the ones digit. The 0 signal and the 0 signal of the seconds and ten digits are obtained first. Here, all 0s are 1 , and then the seconds units digits 0-5 are called twice, 0-2 is issued as a beep ~ beep ~ , and 4-5 is issued as a beep ~ Beep ~ , it will listen for 3 seconds, which is more in line with the design of ordinary clock timekeeping. Here we get the truth table of 1-2 , 4-5 , 0001 , 0010 , 0100 , 0101 , and simplify them through the formula method to get the result , and then connected to the circuit. The last thing needed is the intermittent sound of Didi, so finally a 2HZ pulse of CD4060 is coupled at the output end through an OR gate . The circuit is shown below, and the entire simulation model will be placed in the appendix.

ZZ73FGUQ8rmfEYwg0HsxfkntbaNBYY6h2jbFFaem.png

 

(7) Display part design

 The digital tube is usually one digit plus a decimal point. I turned the third digital tube and the five digital tubes upside down just to achieve the interval between hours, minutes and seconds, and connected the decimal point to a 1HZ pulse and used a transistor to drive it. The middle decimal point is Achieved the purpose of 1HZ frequency flashing

OE4SP5nIDaFow0n7qFoee6noN2kTJfBvGT3R7Kpk.png

 

For the third and fifth digital tubes and cd4511, the wiring is as follows
Digital tube end CD4511 end
a d
b e
c f
d a
e b
f c
g g

6. Welding debugging

 

(1) Prepare the materials before welding (see the BOM list for specific materials), which can effectively reduce the welding debugging time during welding. Let’s start welding. First, weld the power circuit. Don’t weld other parts first. First, weld the circuit power supply. The circuit and the pulse circuit are welded well. The power circuit has a diode. This diode uses a Schottky diode as an anti-reverse diode. SS24, SS14, and SS34 are recommended. If not, you can use an ordinary diode or short-circuit it directly with solder wire. However, If you short-circuit directly, be sure not to solder the electrolytic capacitor backwards, otherwise there will be a risk of explosion. When the power light is on, solder the CD4060 chip and its peripheral circuits, and then use an oscilloscope to hook the upper pin of the crystal oscillator. When the frequency is 32768HZ It shows that the crystal oscillator is working normally, and the actual display is as follows:

6cePmFNZGgRu7Vd3dicuUFLFR9cHsdz2qQ8yRrq0.png

 

xUZ5V1lZraniyQ3vsYkDa9VjfLy5kWuOafBfDMU1.png

 

(2) Next, proceed with the welding and debugging of the display part. First, weld the button circuit and 74ls08 and 74ls32 , then weld the second CD4518 and two CD5411 , and finally weld the digital tube. Note: The third digital tube Remember to do the opposite when welding the fifth digital tube. 

 

(3) Next, solder the clock and second circuits, and repeat the power-on test. The third and fifth digital tubes must be connected in reverse. If they are connected incorrectly, it will be very difficult to remove.

xX6En7H3pSDAbdCs1f4b1uPTpK2jmDjKNBiYjcO9.png

(4) When welding the hourly time signal circuit, first weld the buzzer drive circuit, then use tweezers to short-circuit the B pole of the transistor to the ground to see if the buzzer drive circuit can be used normally, and then connect the remaining After the circuit is welded, power on and test to see if the digital tube runs normally, whether the buttons can adjust the time, and the buzzer's hourly time reporting function are tested one by one. The completion of all functions means the debugging of the work is completed.

wGmlH729OufLno9naUGYUUXC5F2DHBfZkfJPtAWw.png

 

 

7. Physical display

 

8. Debugging precautions

1. When welding, pay attention to soldering each pin well, because a lot of chips are used. Also, be careful not to solder the chips in the wrong direction, or to avoid false soldering. Especially if there is a problem in the test, check these problems first.

2. Remember not to solder the wrong parameters on the crystal oscillator capacitors and resistors, otherwise it will cause the oscillation to fail. If the capacitors and resistors do not have the same parameters, they can be of similar size, but the difference cannot be too big.

3. Remember to solder the bypass capacitor and power capacitor next to each chip. The bypass capacitor is to avoid unknown errors when the power signal is unstable. The power electrolytic capacitor is to prevent the circuit from maintaining voltage stability when the power supply is stable.

4. Remember to connect the third and fifth digital tubes in reverse. It will be difficult to remove them if they are soldered.

5. The timekeeping circuit will pause for a moment at the third second. This is a normal phenomenon and was designed this way during design.

 

 

3 main components

serial number Device name quantity   serial number Device name quantity
1 CD4518 3   5 74LS32 1
2 CD4511 6   6 74LS08 1
3 74LS74 1   7 74LS20 3
4 CD4060 1   8 Common cathode digital tube 6

 

 

 

 

 

 

 

 

 

 

 

 

参考设计图片
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Update:2025-06-22 11:01:24

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