Source: https://oshwhub.com/SWQ572245254/ji-yuad9958-di-shuang-tong-dao-xin-hao-fa-sheng-qi

AD9958 Introduction

AD9958 is a DDS device with high performance, excellent dynamic characteristics and dual output produced by Analog Devices. Each channel can independently control frequency, phase/amplitude. This flexibility can be used to correct imbalances between signals caused by analog processing such as filtering, amplification, or PCB layout mismatches . Because both channels share a common system clock, they are inherently synchronized and can support synchronization of multiple devices. AD9958 integrates a 10-bit output amplitude control internally, and the internal operating frequency is as high as 500 MHz, allowing it to generate dual-channel signals with a frequency of 250MHz. There are many internal control registers for controlling output signal parameters, with 32-bit frequency adjustment resolution, 14-bit phase offset resolution, 10-bit output amplitude scalable resolution, and a serial SPI port to enhance data throughput. It can work in multiple modes, supporting single-tone signal mode (single-tone), modulation mode (modulation mode), linear sweep mode (linearsweep) and mixed signal mode. Frequency, phase or amplitude modulation (FSK, PSK, ASK) up to 16th order can be performed.

AD9958 serial port features and working modes

The following table shows the pin configuration table of the 4 modes:

In serial operations, including instruction cycles and communication cycles, the instruction cycle is generally transmitted first. The instruction cycle corresponds to the first 8 rising edges of SCLK, and its corresponding instruction word (8 bits) contains the following information:

The figure below is the timing diagram for writing data of AD9958. SCLK is valid on the falling edge, and reading data is valid on the high level.

The figure below shows the calculation formula of frequency and phase.