2013 Question D (Undergraduate): Radio Frequency Broadband Amplifier

1. Question content and requirements

1.1 Content

Design and build an RF broadband amplifier.

1.2 Requirements

1.2.1 Basic requirements

(1) Voltage gain A v ≥ 20dB, input voltage effective value U i ≤ 20mV. A v in the range of 0~20dB

Adjustable within the circumference.

(2) The maximum output sine wave voltage effective value U o ≥ 200mV, and the output signal waveform has no obvious distortion.

(3) The lower limit frequency f L of the amplifier BW -3dB is ≤0.3MHz, and the upper limit frequency f H is ≥20MHz, and it must be

Find the gain fluctuation ≤ 1dB in the 1MHz ~ 15MHz frequency band.

(4) The input impedance of the amplifier = 50W, the output impedance = 50 W.

1.2.2 Play part

(1) Voltage gain A v ≥ 60dB, input voltage effective value U i ≤ 1 mV. A v is adjustable in the range of 0~60dB.

(2) When Av ≥60dB, the peak-to-peak value of the noise voltage at the output end U oNpp ≤100mV.

(3) The lower limit frequency f L of the amplifier BW -3dB is ≤0.3MHz, the upper limit frequency f H is ≥100MHz, and the gain fluctuation is required to be ≤1dB in the 1MHz ~ 80MHz frequency band. This project requires testing under the conditions of A v ≥ 60dB (or the highest achievable voltage gain point), the maximum output sine wave voltage effective value U o ≥ 1V, and the output signal waveform without obvious distortion.

(4) The maximum output sine wave voltage effective value U o ≥1V, and the output signal waveform has no obvious distortion.

(5) Others (such as further increasing the gain and bandwidth of the amplifier, etc.).

1.3 Description

(1) It is required to reserve test terminals at both ends of the load resistor. The maximum effective value of the output sine wave voltage should be tested under the condition of RL =50W (the RL resistance error is required to be ≤5%). If the load resistance does not meet the requirements, no points will be awarded for this project.

(2) During the evaluation, the participating teams must prepare their own DC stabilized power supply with 220V AC input.

(3) The recommended test block diagram is shown in Figure 1, and the point frequency test method can be used. The schematic diagram of the amplitude-frequency characteristics of the radio frequency broadband amplifier is shown in Figure 2.

2. Design ideas

After analyzing the topic, it can be seen that we need to make a radio frequency broadband amplifier with controllable gain. We have adopted two methods for gain control. The first is manual control, and the second is microcontroller control. Therefore, the overall circuit design can be divided into two parts: the analog signal processing circuit part and the microcontroller display and control part.

For the analog signal processing circuit part, we made the following analysis: The hardware needs to achieve the following indicators: the gain range is 20dB-60dB gain controllable, U o ≥ 1V, the effective value of the input voltage U i is 1mV- 20mV (when the gain is greater than 60dB, the effective value of the input voltage U i ≤1 mV), the frequency bandwidth is 0.3MHz—

100MHz. Based on the magnitude of the input signal and the gain of the overall system, we decided to use a low-noise small-signal amplifier in the first-stage circuit; the second-stage is a controllable gain amplifier. There are many solutions that can be used at this stage, and we can usually use them. There are VCA voltage-controlled gain amplifiers, analog multipliers, high-frequency attenuators, etc.; the third stage is a

A fixed gain module. Considering that the gain of the first two stages may be around 40dB and the bandwidth problem, a broadband fixed gain amplifier is finally needed.

For the display and control part of the microcontroller, there are the following requirements: input button circuit, display control information circuit, and control gain part.

To sum up, the first-level circuit uses a small-signal amplifier based on the ERA-8SM chip, the second-level circuit uses a program-controlled amplifier based on the VCA821 chip, and the third-level circuit uses a fixed-gain amplification based on OPA695. The microcontroller uses stm32 chip.

3. Schematic analysis

3.1 First-stage small signal amplification circuit

As shown in Figure 1, it is the first-stage ERA-8SM low-noise small signal amplifier circuit. R2 is a current-limiting resistor, and its resistance is related to the added VCC. The L1 DC feed uses an inductor component with a larger inductance. Since ERA-8SM requires 50Ω impedance matching, a 1uf resistor is added after actual adjustment and calculation. capacitance.

figure 1

3.2 Second-stage programmable gain control circuit

As shown in Figure 2, it is the second-stage VCA821 gain control circuit. R14 is the gain resistor. In order to allow the input to receive a larger voltage amplitude, the resistor value is 220Q. Since the circuit is a single-ended input, the -Vin pin is connected in series with a 22Ω resistor to ground. The reference voltage VREF pin is connected to the ground through a small resistor, in order to use the 0V voltage as a reference

Test, the control voltage range is 0-2V.

In the process of manual control, because the control voltage of VCA821 is 0-2V, so take R5=20k, RP1=10k, then the control voltage is 0-1.667V.

figure 2

3.3 Third stage fixed gain circuit

As shown in Figure 3 and Figure 4, it is a third-stage fixed gain circuit. This circuit is composed of two OPA695 modules cascaded, which makes the amplification performance of the entire system more stable and reliable.

Figure 3 Figure 4

4. Physical display

Figure 5 First-stage circuit small signal amplification

Figure 5

Figure 6 Second-stage circuit controllable gain amplification

Figure 6

Figure 7 Fixed amplification of the third stage circuit

Figure 7

5. Debugging process

5.1 Bandwidth Debugging

5.1.1 When Av≥60dB, the gain fluctuation in the 1MHz-80MHz frequency band is ≤1dB.

f=1MHz

Figure 8

f=20MHz

Figure 9

f=40MHz

Figure 10

f=60MHz

Figure 11

f=80MHz

Figure 12

It can be seen that the gain fluctuation is ≤1dB in the 1MHz-80MHz frequency band, which meets the requirements.

5.1.2 The lower limit frequency f L of amplifier BW -3dB is ≤0.3MHz, and the upper limit frequency f H is ≥100MHz debugging

From Figure 13 below, we can see that the lower limit frequency f L=0.22MHz of the amplifier BW -3dB

Figure 13

As shown in Figure 14 below, the upper limit frequency f H=104MHz of the amplifier BW -3dB

Figure 14

5.2 Debugging controllable gain. Here we choose the sine wave signal with input signal frequency = 40MHz and Ui = 1mV

Figure 15 is the waveform at 60dB gain

Figure 15

Figure 16 is the waveform at 40dB gain

Figure 16

Figure 17 is the waveform at 20dB gain

Figure 17

5.3 Noise test

It can be seen from Figure 18 that when A v ≥60dB, the peak-to-peak value of the output noise voltage U oNpp = about 38mV, which meets the requirements.

Figure 18

6. Video demonstration

System debugging video address: https://www.bilibili.com/video/BV1Vv411i7f7/

7. Source code attachments

Figure 19

Other module links:

Programmable amplifier: https://oshwhub.com/he-mu-cao/vca821

First stage fixed gain amplifier: https://oshwhub.com/he-mu-cao/ova11

Second stage fixed gain amplifier: https://oshwhub.com/he-mu-cao/opa22