Design specifications:

1) Frequency measurement range: 1Hz ~ 99.99kHz

2) Input voltage amplitude: > 20 mV

3) Input signal waveform: square wave, triangle wave, sine wave, sawtooth wave

4) Display digits: 4 decimal digits

5) Measuring range: divided into two levels: x1 and x10

6) When the frequency of the measured signal exceeds the measurement range, an alarm will be issued

The components of digital frequency meter

The main function of a digital frequency meter is to measure the frequency of periodic signals. The so-called frequency is the number of times a periodic signal changes within unit time (1 s ). If the number of repeated changes of this periodic signal measured within a certain time interval T is N, then its frequency can be expressed as f _x =N/T. Therefore, the signal can be amplified and shaped, and then the number of signals per unit time can be accumulated by a counter, and then the measurement results can be decoded, displayed, and output. This is the so-called frequency measurement method. It can be seen that the digital frequency meter is mainly composed of an amplification and shaping circuit, a gate circuit, a counter circuit, a latch, a time base circuit, a logic control, and a decoding display circuit.

It can be seen from the schematic diagram that the measured signal Vx is transformed into the pulse signal I required by the counter through the amplification and shaping circuit. Its frequency is the same as the frequency fx of the measured signal. It is sent to the gate circuit composed of NAND gate; time base circuit Provides a 0.5Hz square wave standard time reference signal II as the other input end of the gate to control the development time of the gate; when it is high level, the counter counts; when it is low level, the counter is maintained and the data is sent to the latch for processing Latch the display and then clear the counter to prepare for the next count. The signal I to be measured is input from the other end of the gate, the frequency of the signal to be measured is fx, and the gate width is 0.5Hz. If the number of pulses counted by the counter during the gate time is N, the frequency of the signal to be measured is fx=N/0.5Hz. It can be seen that the gate time T determines the measurement range. It is selected through the gate time base selection switch. If T is larger, the measurement accuracy will be higher. If T is smaller, the measurement accuracy will be lower. Select the gate time according to the measured frequency to control the measurement range. In the entire circuit, the time base circuit is the key. Whether the pulse width of the gate signal is accurate directly determines whether the measurement result is accurate.

Digital frequency meter unit circuit design

1. Amplification and shaping circuit design

The zero-crossing comparator composed of the operational amplifier NE5532 with a gain bandwidth product of 10MHz can prevent the input signal from being distorted; the zero-crossing comparator composed of the operational amplifier can enable the counter to effectively identify pulse signals; D1 and D2w Zener diodes make the signal The amplitude remains at 5Vpp, and R3 acts as a current limiting function.                                                                                               

74LS160 divides the signal by 10 to achieve 10 times expansion. When the light is turned on to x10, the displayed number is 1/10 of the actual frequency. The following part of the circuit is composed of a voltage follower composed of NE5532 and a ten-digit frequency counter composed of 74LS160.

2. Design of time base circuit

Pulse generators usually use the pulses emitted by the crystal oscillator to undergo shaping and frequency division to obtain 2Hz second pulses. The crystal oscillator is 32768 Hz. After dividing by 14, a pulse output of 2Hz can be obtained. Since the frequency generated by the oscillator is very high, a frequency dividing circuit is required to obtain second pulses. This experiment uses a 32768HZ crystal oscillator to generate clock pulses. What the experiment requires is a standard second pulse signal, so 74ls74 is used to divide the frequency by 4 to get the standard 0.5HZ signal we need.

Frequency division output waveform:

3. Logic control circuit design

In a sense, the control circuit is the key to the success or failure of the entire machine circuit design. The negative transition generated at the end of the time base signal II is used to generate the latch signal IV, and the negative transition of the latch signal IV is used to generate the clear "0" signal V. Pulse signals IV and V can be generated by two monostable flip-flops 74LSl23, and their pulse widths are determined by the time constant of the circuit. When the trigger pulse is input from terminal B, under the action of the negative transition of the trigger pulse, the output terminal Q can obtain a positive pulse, and the non-terminal Q can obtain a negative pulse. The waveform relationship exactly meets the requirements of IV and V.

74LS123 is a retriggerable monostable multivibrator. It is pulse-triggered by high level or low level, and the pulse width obtained from the trigger is adjustable.

4. Latch

The function of the latch is to latch the number counted by the counter at the end of the gate time, so that the value of the counter at this time can be displayed stably on the display. At the end of the gate time, the logic control circuit sends out the latch signal IV and sends the counter value at this time to the decoding display. The above functions can be completed by selecting 8D latch 74LS273. When the positive transition of the clock pulse CP comes, the output of the latch is equal to the input, that is, Q=D. Thus, the output value of the counter is sent to the output terminal of the latch. After the positive pulse ends, no matter what the value of D is, the state of the output terminal Q remains _unchanged . Therefore, during the counting period, the output of the counter will not be sent to the decoding display.

5. Counting, decoding and display circuit design

1) Counting circuit: composed of 74LS160.

2) Decoding display circuit: used to convert the decimal number represented by the BCD code output by the counter into a segment signal that can drive the digital tube display to obtain a digital display. CD4511 is a BCD code-seven-segment decoder used to drive common cathode LED (nixie tube) displays; its features include: BCD conversion, blanking and latch control, seven-segment decoding and drive function CMOS circuit capabilities Provides larger current draw. Can directly drive LED display.

** The CD4511 pin diagram is as follows: **

Its functions are as follows:

D, C, B, A: 8421 BCD code input terminals

a, b, c, d, e, f, g: are decoding output terminals, valid when the output is high level 1

CD4511 has an internal pull-up resistor. You only need to connect a current-limiting resistor between the input terminal and the digital tube pen terminal to work normally.

CD4511 logic function table:

CD4511 can only drive common cathode digital tubes.

6. Alarm circuit

This design requires 4-digit display, with the highest display being 9999. If it exceeds 9999, an alarm is required. That is, when the thousands digit reaches 9 (i.e. 1001), if there is another clock pulse (i.e. carry rush) on the hundreds digit, this can be used to control the buzzer alarm. The circuit is as shown below:

Physical map