RA-AIO-PRO

# RA-AIO-PRO Multifunctional Verification Board
## V1.0 Prototype Testing
- Prototype Image
- Onboard Power Supply Testing, Test Tool: Multimeter. The onboard DC interface inputs +12V power; multimeter measurement is normal, reverse connection test is normal. After conversion to 5V via DCDC, the measured value is 4.906V, reverse connection test is normal. After outputting 3.3V via LDO, the measured value is 3.293V, reverse connection test is normal. Backflow prevention test is normal.
- Prototype image: WS2812B-3535 LEDs are soldered on the board, with a reserved package compatible with WS2812B-5050 package. Switching to the RA MCU control allows connection of multiple plug-ins to control multiple WS2812B lighting boards (switching to external input control). Combined with the onboard SPI FLASH chip (stores lighting effect configuration files), it can be used as a lighting controller.
- Onboard CH340N testing, test system: Arch Linux, test software: SerialTest. Self-transmission and reception over 3 million times, data transmission and reception normal, no anomalies.
- Onboard CMSIS-DAP/JLINK test, test system: Arch Linux, test software: SerialTest, Jlink Flash, etc.
Firmware burning normal, normal recognition. Firmware burning normal.
JLINK CDC serial port, the RX pull-up resistor value was incorrect in version V1.0, fixed in V1.01, virtual serial port test.
- Onboard SPI Flash test, test system: Arch Linux, test software: JFlashSPIExe. Test normal. Onboard SPI FLASH is compatible with SPI Flash and QSPI Flash. SPI Flash is soldered on the board.
- Onboard ESP12S test, test system: Arch Linux, test software: ESP32 development environment. Test normal.
- Other functions are temporarily unavailable due to component shortage, will continue to be verified after components are replenished.
### V1.01 Update
1. Replaced the out-of-stock reverse connection protection diode with DSK14.
2. Fixed the issue of the onboard CMSIS-DAP/JLINK RX not receiving signals; added a 10K pull-up resistor.
3. Added a test point for the onboard CMSIS-DAP/JLINK BOOT0, adjusted the 3.3V test point, and added the ability to flash firmware in DFU mode.
4. Optimized the spacing between the DC-DC 5V power supply, inductor, and freewheeling diode.
5. Optimized the notch area to prevent wire breakage.
6. Optimized the height of the 3D top shell screw posts for better fit.
7. Optimized the Type-C USB differential cable to ensure signal integrity.
### To be updated
1. 3D shell Type-C opening, DC power socket adjustment
2. Other functions to be tested
### V1.0 Update
1. Completed RA-AIO-PRO schematic design
2. Completed RA-AIO-RPO PCB design
3. Completed RA-AIO-PRO 3D shell design
## Hardware function design
- [x] 32.768Khz and 8MHz -- Verified
- [x] USB2TTL -- Verified
- [x] Serial port debugging -- Verified
- [x] SW/JTAG debugging -- Verified
- [x] ESP12-S -- Verified
- [x] I2C -- Verified
- [x] SPI Flash SOP8 and SSOP8 -- Verified
- [ ] CAN/LIN -- Chip out of stock
- [x] WS2812B Lighting control ---- Verified
- [x] Buzzer -- -- Verified
- [ NPN/PNP Control -- Removed due to insufficient board space
- [x] Onboard CMSIS-DAP/JLink-OB Debugger -- Verified
- [x] USB 2.0 480Mbps Impedance Control -- Verified
- [x] and other verified interfaces.