SYZYGY is an FPGA extension standard for medium to high speed interfaces. This design is a breakout board for connecting dual Atto320 LWIR sensors. Designed to mate with existing sensor breakout boards that provide FFC connectivity.
SYZYGY is an FPGA extension standard for medium to high speed interfaces. This design breaks out all 32 I/O pins into taps with 0.1" headers. A small prototyping area is also provided.
This design is a connector for the Raspberry Pi HQ camera.
It is a very beautiful and convenient little board. But it has a small flaw, the ice40 FPGA it uses is very simple, and it's generally fun to see people doing exciting projects with 5k LUTs. Sometimes it's convenient to have some extra space available when experimenting.
icebreaker++ is a very nice and convenient little board. But it has a small flaw, the ice40 FPGA it uses is very simple, and it's generally fun to see people doing exciting projects with 5k LUTs. Sometimes it's convenient to have some extra space available when experimenting.
SYZYGY is an FPGA extension standard for medium to high speed interfaces. This design splits the video output to a regular digital display and also supports input from the digital display. It connects to the SERDES via a SYZYGY-TXR connector. Would love to be able to test the 5Gbps output of high resolution GPDI.
SYZYGY is an FPGA extension standard for medium to high speed interfaces. This project is a splitter that outputs video to a regular digital display and also supports input from a digital display.
The icebreaker project is a very nice and handy little board. But it has a small flaw, the ice40 FPGA it uses is very simple, and it's generally fun to see people doing exciting projects with 5k LUTs. Sometimes it's convenient to have some extra space available when experimenting.
The biggest feature of this open source oscilloscope is its strong waveform rendering (afterglow/fluorescence) effect. At the beginning, the author used Raspberry Pi Module 3, which can render 22,000 frames per second. In the later stage, NVIDIA Jetson is used, which can render 130,000 frames. frame. ZYNQ's FPGA is responsible for triggering and data acquisition, and A9 is responsible for transmitting data to the Raspberry Pi. Then the Raspberry Pi does the display processing. The ADC uses 1Gsps HMCAD1511.
ScopeFun is an open source all-in-one instrumentation platform. It includes oscilloscopes, arbitrary waveform generators, spectrum analyzers, logic analyzers and digital pattern generators.
The physical layer data sending and receiving of a PC is very simple. As long as one condition is met, that is, the CRC check of the data packet is correct, the network card can send the data packet to the application software. Otherwise, the network card will directly discard the data packet, which cannot be caught by any software. to the data packet.
CPLD portable digital storage oscilloscope hardware platform design
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