All 12 I/O pins of this design are broken out to 0.1" headers. All 4 TX/RX channels and the reference clock are broken out to SMA connections.
This design is a breakout board for SGMII Gigabit Ethernet PHY DP83867C. It connects to SERDES via a SYZYGY-TXR connector to test and evaluate Ethernet over 1.25Gbps serial channels. 2 channels are used and CDR is required on the RX path. Compared to RGMII, SGMII significantly reduces the number of signals required for routing.
Connect to a 5" LCD paired with a Sipeed Tang Nano. This is an 800x480 LCD with RGB888 connections. All 8 bits of each channel are connected via SYZYGY connectors.
SYZYGY is an FPGA extension standard for medium to high speed interfaces. This design is a splitter for 4x PMOD connectors. All 32 I/O signals from the SYZYGY connector are brought out. 8 on each PMOD.
The EPC901 is a 1024x1 CCD sensor capable of providing 50MHz pixel output. It outputs analog voltage from the CCD element. The author paired it with a 50MSps ADC on a SYZYGY board. The datasheet says it can run up to 50k fps. External I/O is provided via optocouplers to facilitate connection to external trigger sources such as motion controllers. This board will assist in conducting experiments on the new PnP platform. Objects can be moved through the line scanner to capture the position of the photo.
SYZYGY is an FPGA extension standard for medium to high speed interfaces. This design is a breakout board for connecting dual Atto320 LWIR sensors. Designed to mate with existing sensor breakout boards that provide FFC connectivity.
The design is a custom 3d model from Sensirion. Sensirion provides a 3d model, but it has very few features.
This design is a connector for the Raspberry Pi HQ camera.
The style of enameled wire is as usual, and the craftsmanship is still excellent. The power board designed this time is made of double panels, and a copper-laying design is applied. The insulation layer is laid first and then the copper. If the device on the front needs to be grounded, break the insulation layer and solder it to the copper.
The board of this design is intended to sit between the fundamental and harmonic boards and monitor the SPI data running to the display. Onboard ECP5 will mirror the display and output a copy to a digital monitor.
This design has a PMOD for the SD card to emulate the SD card to the host system.
A PMOD with a quad 7-segment display connected to a pair of 74hc595 shift registers. There are 3 tactile buttons.
Suitable for long distance RS-485 networks. The design provides transient protection from the effects of ESD, EFT and surge transients as specified in the IEC 61000 transient immunity standard.
This design is a PMOD with the ublox NEO GNSS receiver footprint. Able to receive GPS and GLONASS simultaneously.
SYZYGY is an FPGA extension standard for medium to high speed interfaces. This breakout connects the SerDes in the SYZYGY-TXR connector to the card edge to act as a PCIe x4 add-in card. This breakout is very simple and can be made into a shorter SYZYGY pod.
SYZYGY is an FPGA extension standard for medium to high speed interfaces. This breakout connects the Channel 0 TX/RX SerDes from the SYZYGY-TXR connector to the edge of the card to act as a PCIe x1 add-in card.
This design is a wing add-on that attaches to the OrangeCrab and adds a Sharp Memory LCD. 400x240 on/off pixels. The board is the size of the monitor.
Simple branching of HDMI cable signals for analysis/verification of signal level and phase.
SYZYGY is an FPGA extension standard for medium to high speed interfaces. This design splits the video output to a regular digital display and also supports input from the digital display. It connects to the SERDES via a SYZYGY-TXR connector. Would love to be able to test the 5Gbps output of high resolution GPDI.
SYZYGY is an FPGA extension standard for medium to high speed interfaces. This project is a splitter that outputs video to a regular digital display and also supports input from a digital display.
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