DIY streamlined development board

cruelfox

DIY streamlined development board [Copy link]

 

I am a DIY guy, and I will use FPGA as the data interface between PC and devices. I have wanted to make such a small development board for a long time, with USB high-speed transmission, and as much external RAM as possible as FIFO, and I don't need many I/Os left by FPGA. I still have Cyclone II stocks on hand, so I will continue to use EP2C5/EP2C8 for design, 144-pin QFP package FPGA. I choose FT232H as the USB interface device. I have used their FT232R and FT245R. This is the first time I use USB 2.0 high-speed. Two-layer PCB design, only four layers are not used unless absolutely necessary (to save costs, I have never DIY four-layer). If the wiring allows, put an IS61LV25616 SRAM. The power supply can be taken from USB 5V or 5mm DC jack input, which can be selected by a jumper. In order to save the USB power cost, I did not use the simple voltage regulation of AMS1117, but arranged two groups of DC-DC to provide 5V to 3.3V, so as to meet the voltage reduction from 3.3V to 1.2V. Drawing the board took a whole weekend and a few nights of spare time. The software was still the old-fashioned Eagle 4.16 that I am used to. In addition, I spent a weekend on soldering and debugging. The following is the PCB layout: FT232H and SRAM occupy most of the I/O, and there are only a dozen pins left. I only placed a 0402 chip capacitor next to the pin next to the FPGA VCCINT, and did not put it on the back of the PCB. This is an attempt, but the disadvantage is that the two adjacent I/O cannot be led out and are wasted. Whether it is worth arranging decoupling in this way needs to be studied. Therefore, the I/O port is even tighter, and the three pins #CE, #UB, and #LB of the SRAM are grounded as a last resort. They are all selected by default and cannot be written in 8-bit. The more troublesome thing is the decoupling and routing of VCCIO and VCCINT, and try not to fragment the GND too much. The following two pictures use colors to distinguish GND, VCCINT (1.2V), and VCCIO (3.3V): When you look at GND alone, it looks like this when you stack them together. Basically, they are all covered, and many vias are used to connect the GND in the two layers. It was my first time to do high-speed USB transmission, and I had no experience. After the PCB was sent out, I searched online. Some said that at least 4 layers of PCB were required, and some said that differential lines could not pass through vias. It seems that my routing was not well laid out, and I was a little nervous. However, the PCB was still adjusted after it was made, and there was no problem with the transmission. Actual effect picture As for the speed of the USB interface, I use the synchronous FIFO mode, and the transfer rate from PC to board can reach more than 19MBytes/s, and the transfer rate from board to PC can reach more than 34MBytes/s. This is also related to the CPU load.

吴下阿蒙

After washing with alcohol, there seems to be white powder on the edge of the solder joint. Using thinner will not cause it.

5之蒲公英

So high-end{:1_103:}

绿茶

A board created based on demand, like it

小梅哥

What era is this? We are still using Cyclone II. How much cooler it would be to use Cyclone IV?

小梅哥

The data transfer rate of ft232 is limited, and it seems not to exceed 2M bytes. You can consider Cy7C68013.

lb1229305710

Thank you for sharing~~:)

lb1229305710

Thank you very much for sharing. Although I have not learned FPGA, I have learned microcontrollers and embedded chips. The principles are probably the same, so I learned FPGA. The post by the host is very detailed and the explanation is very thorough, so I support it. I hope the host can post more and better DIY tutorials. Thank you~~~:)

chenzhufly

It looks good. The welding skills are good, but the board is very dirty.  

574433742

Wow, it looks amazing...

574433742

Thanks for sharing. . . .

cruelfox

chenzhufly posted on 2015-8-11 15:46 It looks good and the soldering skills are good, but the board is very dirty

I usually use rosin for flux, and I wiped it several times with cotton wool dipped in anhydrous alcohol, but there are still white marks around the densely packed pins.

吴下阿蒙

Alcohol is not enough to clean the board thoroughly, it is better to use thinner.

eric_wang

:):time:

eric_wang

Wuxia Amon posted on 2015-8-12 08:51 Using alcohol to clean the board is not enough, using thinner is better.

You can also use that, I have learned something new

通宵敲代码

Wuxia Amon posted on 2015-8-12 12:12 After washing with alcohol, there seems to be white powder on the edge of the solder joint. Using thinner will not cause this.

Well, alcohol dissolves the rosin, and then evaporates! Only the old rosin is left!

通宵敲代码

:Laugh: Can you send me a copy of the design information?

5525

Xiao Meige posted on 2015-8-11 09:52 The data transmission rate of ft232 is limited, and it seems not to exceed 2M bytes. You can consider Cy7C68013.

The speed of FT245 FIFO mode is good, not worse than Cypress. The upper interface should be 40MB/s (PC internal should also be good) and the lower interface is 8bit, 60MHz

5525

I remember that the FT245 chip has JTAG pins, and they are independent of the FIFO pins. Why don't you use the usb-jtag to configure the FPGA?

cruelfox

5525 posted on 2016-6-18 22:05 I remember that the FT245 chip has JTAG pins, and they are independent of the FIFO pins. Why don't you use usb-jtag to configure the FPGA?

You must have remembered it wrongly. The FT2232H only has two ports, and the FT232H I use only has one port. The FT245 is only a full-speed chip.