Gated automatic light circuit (2)

- A gated automatic lighting circuit composed of Suning integrated circuits and other devices. It
consists of door and window sensors, CD4093 digital integrated circuit homomorphic relays and power circuits.
    Normally when the room is closed. K is affected by the magnetic field of the magnet and is powered on. The input terminal of the inverter f and I is at
high level . After inverting, rP is input at low level. When the door is raised, the magnet is away from the T reed relay and the K contact jumps. No,
the input terminal of door III is low level, and the output is high level , that is: the door is closed - o; the door is not 1, the photosensitive transistor
WlP and R form an optical circuit, there is no light at night, VTP is cut off, and the output is "O"; when the cypress is illuminated during the day,
Vir is turned on and the output is "1".
    Schnandt NAND gates I and II form a typical RS trigger flip-flop. The J'] control signal and the light control signal are respectively
used as the input signals of the S (set to "l") terminal and the R (set to "()") terminal. From the truth table of the RS flip-flop (see Table 7
1), we can know that only when R=O (i.e., night, no light) and S-1 (the door is opened), its output terminal Q,
i.e., pin ④, is " ." After being inverted by inverter IV, pin ③ outputs high voltage +, turning on the one-pole diode VT,
turning on the solid-state relay SSR, lighting the lamp F, and at the same time, the light-emitting diodes I and ED also light up for indication. And when R=l
(that is, n days, there is light). Or when so (the door is closed) is called, the output terminal Ql, after gate circuit IV is inverted
, makes V1I cut off, SSR is turned off, and spider F will not be lit.
    VD1, (, I and R; cyanosis extends to the lU road, and the "i" signal is delayed by about 10 s. In this way,
when the door is opened and people enter (exit), the electric door E will not be closed accordingly. , and it needs to be delayed for 40s before extinguishing.
The delay circuit fully utilizes the high input Frl+/Lt of the CMOS circuit (greater than 10Mn), and uses a smaller capacitor
to obtain a relatively long delay time:
    the book machine DC 1 operating voltage mountain ■Obtained after step-down, VD2~VDa rectification, vs voltage stabilization, the entire power supply
part has no heating element, consumes less U electrodes, can work through IU during pregnancy, and the power consumption will not exceed
ikWh when
    powered on at the same time. I-IV uses block 4 Schmidt NAND gate digital integrated circuit CI) 4003. SSR uses IC, type
solid state relay TA (, OIS, the maximum driving capacity is IA. C. It is required to use C,1{B400V type polypropylene Capacitors
... It is required to use electrolytic capacitors with as small a leakage current as possible, preferably tantalum electrolysis. The requirements for merchant sensors are
the same as the examples, and there are no special requirements for other components.