MUX circuit diagram

MUX circuit

The MUX circuit is shown in the figure. Its main function is to select 35 measured voltages to ensure that only one voltage enters the subsequent analog-to-digital conversion circuit for data conversion at a certain time. The MUX circuit consists of two stages. The front stage is composed of five multiplexers with eight choices. The 35 measured voltages are connected to these MUXs after conditioning. Only the wiring diagrams of two blocks are shown in the figure. The rest are The three blocks are basically the same. The rear stage is composed of a multiplexer to further select the five voltages output by the front stage. In the figure, the signals MUX1 and MUX2 select the front-end chip, the signals DD0, DD1, and DD2 select the front-end channels, and the signals DD5, DD6, and DD7 select the rear-end channels. These signals are all generated by CPLD.