How to achieve zero no-load power

    We've all done it: leaving our phone charger at home or at our desk, but the phone itself is in our pocket or hand. No big deal, right? Actually, it is. When we realize there are millions of these chargers, the power consumed by these unused chargers, which are essentially doing nothing, is quite significant, consuming around 10% of our domestic power consumption.

    One surefire way to reduce consumption is to unplug the charger when the device is not actively being used. Old habits die hard. So, instead of trying to convince consumers to unplug, let us, as power designers, design a charger or adapter that consumes as little power as possible in a no-load state (also known as no-load or standby).

    So how low can you go without unplugging? Leading mobile phone manufacturers recently established a rating system that awards stars based on no-load power consumption to encourage adapter designs with minimal standby power consumption. Despite the five-star requirement, the ultimate goal is to lower the target rating to a "zero-power" solution. An adapter is considered zero-power if its no-load power is less than 5mW when measured at an input voltage of 230Vac. Achieving no-load power below 5mW is not easy, as it involves compromises with other design goals.

    Texas Instruments offers a chipset: the UCC28730 zero-power primary-side regulation (PSR) flyback controller and wake-up monitor, and the UCC24650 200V wake-up monitor for fast transient PSR. This chipset offers a wide range of features to enable designs with standby power of <5mW without compromising design goals such as fast transient response, low component count, and small size. Figure 1 shows a typical application of the UCC28730/UCC24650 chipset.

    Figure 1: Typical flyback converter application using the UCC28730/UCC24650

    The high-voltage startup switch eliminates the constant losses associated with the startup resistor. The PSR reduces component count and associated bias losses for the optocoupler and regulator. The UCC28730's undervoltage lockout (UVLO) hysteresis allows the VDD voltage to drop to approximately 8V during standby without triggering the UVLO. Using a low bias voltage of (for example) 12V, combined with low standby supply current (typically 52µA), only "costs" approximately 0.624mW under no-load conditions. The UCC24650 also has very low bias current (typically 41µA) and is biased directly from the output rail, consuming approximately 0.205mW from a 5V adapter. The total bias power uses a total power budget of less than 0.830mW.

    The unavoidable losses that need to be considered are the secondary-side leakage losses associated with the output capacitor and Schottky diode. A typical 10W design can result in leakage losses comparable to the bias power. The combined bias power and these leakage losses constitute the minimum energy that needs to be delivered per switching cycle.

    The act of transferring this energy generates losses proportional to the energy consumed during each switching cycle. The best overall approach to reducing standby power consumption is to lower the switching frequency and minimize the peak current under no-load conditions. The wide dynamic range of the UCC28730 control law reduces the peak current to one-third of its full-load value and allows the switching frequency to be reduced to 32 Hz at no-load, thus maintaining low dynamic switching losses while maintaining standby operation.

    With no-load power consumption minimized, the remaining design goals need to be considered. Low switching frequency typically requires large output capacitors to maintain output voltage regulation during large load transients. The UCC24650 is designed to send a wake-up signal to the UCC28730 so it can quickly respond to load changes, minimizing output voltage droop without requiring large output capacitors.

    The UCC28730/UCC24650 chipset helps achieve a zero-power state by minimizing its own contribution to standby power consumption, while still operating in a manner that minimizes system-level losses. Together, the UCC28730 and UCC24650 require less than 1mW of power to remain active during standby, yet still be ready to respond to sudden, heavy load steps. The UCC28730's wide dynamic control range reduces switching frequency and peak current during standby. The UCC24650 wake-up monitor, requiring no external components and minimizing bias power, complements the primary-side UCC28730 to meet no-load power requirements and transient response requirements. While careful attention must still be paid to every possible contributor to ensure collective standby losses are minimized, achieving five-star or even zero power consumption is possible with the UCC28730 and UCC24650.