Should I choose voltage mode or current mode for fixed frequency pulse width modulation (PWM) control?

There are two types of fixed-frequency pulse-width modulation (PWM) control: voltage mode (VM) and current mode (CM). Figure 1 shows a diagram explaining these two types of control. This simple block diagram is very useful for understanding the different parts of the loop.

Figure 1: Block diagram of a fixed-frequency PWM controlled power supply

    One of the key differences between VM and CM is the ramp input to the PWM comparator. In VM, this ramp is a sawtooth waveform generated internally by the PWM controller. In CM, the ramp is generated proportionally to the measured current. This subtle difference in PWM signal generation can lead to significant differences in control loop behavior.

Consider a simple nonisolated buck converter. When using VM, the power stage will have a two-pole response related to the inductor value and output capacitance. When using the same power stage but implementing CM control, the response becomes a single-pole related to the output capacitance and load resistance. This means that different types of compensation are required for VM and CM.

Remember, CM control uses a ramp proportional to the actual current, so we must have some way to measure this current. Measuring the current and obtaining a clean signal is the most challenging part of CM control. A CM mode regulator uses the current through the inductor as part of the feedback loop. The input signals to the PWM modulator are the current through the inductor and the error signal output by the error amplifier. The current through the inductor is sensed and compared with Vc, the output of the error amplifier. In CM control mode, slope compensation is required to avoid subharmonic oscillation when the PWM signal duty cycle exceeds 50%.

    The primary issue with CM control is switching noise picked up by the current sense signal. This noise can be addressed in a number of ways. Leading-edge blanking essentially ignores the first 50-100ns of the current sense signal. This is effective but can lead to minimum timing and fault protection issues. Using an RC resistor and capacitor network to filter the signal is also an option, but we'll again run into fault protection issues. Therefore, even though compensation is easier with CM control, it's not always the best option.

Why use current mode? A closer look at the response of the current control loop reveals that when the control FET is on, the current through RSENSE passes through the current sensing circuit and is converted into a voltage ramp signal. This voltage ramp is proportional to the ramp current in the inductor. This slope-compensated voltage ramp is compared with the output voltage of the error amplifier. The control FET in the figure remains on until the two voltages are equal. When they are equal, the control FET turns off. A fixed-frequency clock signal, CLK, then sets the RS flip-flop, initiating the next switching cycle. The peak current flowing through the control FET switch and inductor is thus primarily determined by the voltage control loop. Because the inductor is within the inner current control loop, CM control mode eliminates the inductor's pole and second-order characteristics (which are present in VM control mode). Therefore, the outer voltage control loop consists solely of a single-pole output filter and load resistor. The CM converter can be considered a current source. The circuit's output capacitor and the parallel load impedance form a single-pole circuit. This current source provides current to the single-pole circuit and regulates it. This means that compensating a CM mode regulator for stability is generally much easier than a VM controller.

Line regulation is defined as the change in output voltage caused by a change in input voltage. Line regulation is related to the gain of the control-to-output transfer function. Since the gain of the control-to-output transfer function of the CM structure is independent of the input voltage, line regulation is excellent. Furthermore, the phase/delay introduced by the single pole of the CM structure is minimal. Therefore, compared to the VM structure, the peak CM control structure has better transient response. Examining the VM structure's control-to-output transfer function reveals that the input voltage directly affects the transfer function's gain. This results in degraded line regulation performance. Modern VM converters address this issue by using voltage feedforward techniques to change the slope of the sawtooth signal based on the input voltage. Table 1 summarizes the advantages and disadvantages of the two structures.

Given the numerous advantages of CM, why use VM control mode? This is because CM designs require two control loops and have higher circuit complexity than VM. VM-controlled regulators can also offer price advantages. Historically, over a wide input voltage operating range, especially at low input voltages and light loads, the current ramp slope can be too slow for a CM controller to operate stably.

    How do we choose the approach that might be right for us? Table 1 shows some of the trade-offs between the two approaches.

Table 1: Advantages (yellow) and disadvantages (blue) of VM and CM control

Power Design Services has completed many TI Designs reference designs in VM and CM:

    Virtual Machine Control – PMP8962, PMP9559, PMP11140.

    CM Control – PMP9727, PMP10288, PMP10979, PMP10852, PMP10871, PMP9581_REVB.

    The choice between CM and VM control is not always easy or obvious, and hopefully the topics discussed here will help us make the right choice for our system.