348RIPT datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > The embedded processor and controller> Microcontrollers and processors> 348RIPT

348RIPT: DescriptionClock Generator, 200MHz, CMOS, PDSO20, 0.150 INCH, SSOP-20; CategoryThe embedded processor and controller Microcontrollers and processors; File Size201KB，9 Pages; ManufacturerIDT (Integrated Device Technology)

Download Datasheet Parametric Compare View All

348RIPT Overview

Clock Generator, 200MHz, CMOS, PDSO20, 0.150 INCH, SSOP-20

348RIPT Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Parts packaging code	SSOP
package instruction	SSOP, SSOP20,.25
Contacts	20
Reach Compliance Code	not_compliant
ECCN code	EAR99
JESD-30 code	R-PDSO-G20
JESD-609 code	e0
length	8.65 mm
Humidity sensitivity level	1
Number of terminals	20
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Maximum output clock frequency	200 MHz
Package body material	PLASTIC/EPOXY
encapsulated code	SSOP
Encapsulate equivalent code	SSOP20,.25
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, SHRINK PITCH
power supply	3.3 V
Master clock/crystal nominal frequency	50 MHz
Certification status	Not Qualified
Maximum seat height	1.75 mm
Maximum supply voltage	3.45 V
Minimum supply voltage	3.15 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn85Pb15)
Terminal form	GULL WING
Terminal pitch	0.635 mm
Terminal location	DUAL
width	3.9 mm
uPs/uCs/peripheral integrated circuit type	CLOCK GENERATOR, OTHER
Base Number Matches	1

Preview

Download Datasheet

View All

DATASHEET

QUAD PLL FIELD PROGRAMMABLE VERSACLOCK SYNTHESIZER

Description

The ICS348 field programmable clock synthesizer

generates up to 9 high-quality, high-frequency clock outputs

including multiple reference clocks from a low frequency

crystal or clock input. The ICS348 has 4 independent

on-chip PLLs and is designed to replace crystals and

crystal oscillators in most electronic systems.

Using IDT’s VersaClock software to configure PLLs and

outputs, the ICS348 contains a One-Time Programmable

(OTP) ROM to allow field programmability. Programming

features include eight selectable configuration registers, up

to two sets of four low-skew outputs.

Using Phase-Locked Loop (PLL) techniques, the device

runs from a standard fundamental mode, inexpensive

crystal, or clock. It can replace multiple crystals and

oscillators, saving board space and cost.

The ICS348 is also available in factory programmed custom

versions for high-volume applications.

ICS348

Features

•

Packaged as 20-pin SSOP (QSOP)

Eight addressable registers

Replaces multiple crystals and oscillators

Output frequencies up to 200 MHz at 3.3V

Input crystal frequency of 5 to 27 MHz

Input clock frequency of 2 to 50 MHz

Up to nine reference outputs

Up to two sets of four low-skew outputs

Operating voltages of 3.3 V

Advanced, low power CMOS process

For one output clock, use the ICS341 (8-pin). For two

output clocks, use the ICS342 (8-pin). For three output

clocks, use the ICS343 (8-pin). For more than three

outputs, use the ICS345 or ICS348.

•

Available in Pb (lead) free packaging

NOTE: EOL for non-green parts to occur on

5/13/10 per PDN U-09-01

Block Diagram

V DD

S 2:S 0

O TP

ROM

w ith

P LL

V alues

P LL1

CLK1

CLK2

P LL2

P LL3

C rystal or

clock input

X 1/IC LK

C rystal

O scillator

GND

P LL4

Divide

Logic

and

Output

Enable

Control

CLK3

CLK4

CLK5

CLK6

CLK7

CLK8

CLK9

E xternal capacitors are

required w ith a crystal input.

P D TS

IDT™ / ICS™

QUAD PLL FIELD PROGRAMMABLE VERSACLOCK SYNTHESIZER 1

ICS348

REV K 092109

348RIPT Related Products

	348RIPT	348RPT	348RI-XX	348RI-XXT	348RIP	348R-XXT	348R-XX	348RP
Description	Clock Generator, 200MHz, CMOS, PDSO20, 0.150 INCH, SSOP-20	Clock Generator, 200MHz, CMOS, PDSO20, 0.150 INCH, SSOP-20	Clock Generator, 200MHz, CMOS, PDSO20, 0.150 INCH, SSOP-20	Clock Generator, 200MHz, CMOS, PDSO20, 0.150 INCH, SSOP-20	Clock Generator, 200MHz, CMOS, PDSO20, 0.150 INCH, SSOP-20	Clock Generator, 200MHz, CMOS, PDSO20, 0.150 INCH, SSOP-20	Clock Generator, 200MHz, CMOS, PDSO20, 0.150 INCH, SSOP-20	Clock Generator, 200MHz, CMOS, PDSO20, 0.150 INCH, SSOP-20
Parts packaging code	SSOP	SSOP	SSOP	SSOP	SSOP	SSOP	SSOP	SSOP
package instruction	SSOP, SSOP20,.25	SSOP, SSOP20,.25	0.150 INCH, SSOP-20	0.150 INCH, SSOP-20	0.150 INCH, SSOP-20	0.150 INCH, SSOP-20	0.150 INCH, SSOP-20	SSOP, SSOP20,.25
Contacts	20	20	20	20	20	20	20	20
Reach Compliance Code	not_compliant	not_compliant	unknown	unknown	not_compliant	unknown	unknown	_compli
ECCN code	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99
JESD-30 code	R-PDSO-G20	R-PDSO-G20	R-PDSO-G20	R-PDSO-G20	R-PDSO-G20	R-PDSO-G20	R-PDSO-G20	R-PDSO-G20
JESD-609 code	e0	e0	e0	e0	e0	e0	e0	e0
length	8.65 mm	8.65 mm	8.65 mm	8.65 mm	8.65 mm	8.65 mm	8.65 mm	8.65 mm
Number of terminals	20	20	20	20	20	20	20	20
Maximum operating temperature	85 °C	70 °C	85 °C	85 °C	85 °C	70 °C	70 °C	70 °C
Maximum output clock frequency	200 MHz	200 MHz	200 MHz	200 MHz	200 MHz	200 MHz	200 MHz	200 MHz
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	SSOP	SSOP	SSOP	SSOP	SSOP	SSOP	SSOP	SSOP
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH
Master clock/crystal nominal frequency	50 MHz	50 MHz	50 MHz	50 MHz	50 MHz	50 MHz	50 MHz	50 MHz
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	1.75 mm	1.75 mm	1.75 mm	1.75 mm	1.75 mm	1.75 mm	1.75 mm	1.75 mm
Maximum supply voltage	3.45 V	3.45 V	3.45 V	3.45 V	3.45 V	3.45 V	3.45 V	3.45 V
Minimum supply voltage	3.15 V	3.15 V	3.15 V	3.15 V	3.15 V	3.15 V	3.15 V	3.15 V
Nominal supply voltage	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	COMMERCIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal surface	Tin/Lead (Sn85Pb15)	Tin/Lead (Sn85Pb15)	TIN LEAD	TIN LEAD	Tin/Lead (Sn85Pb15)	TIN LEAD	TIN LEAD	Tin/Lead (Sn85Pb15)
Terminal form	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING
Terminal pitch	0.635 mm	0.635 mm	0.635 mm	0.635 mm	0.635 mm	0.635 mm	0.635 mm	0.635 mm
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL
width	3.9 mm	3.9 mm	3.9 mm	3.9 mm	3.9 mm	3.9 mm	3.9 mm	3.9 mm
uPs/uCs/peripheral integrated circuit type	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER
Base Number Matches	1	1	1	1	1	-	-	-
Maker	-	-	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)

Recommended Resources

High battery life LED circuit based on GEC8310

Transceiver external microphone circuit diagram

Oscillation detection automatic watering controller circuit

photosensitive oscillator circuit

Computer motherboard circuit diagram 440BX_11

EEWORLD University Hall----Smart Crutch: Smart Cane : https://training.eeworld.com.cn/course/4056...; 李炳1991 MCU

MSP-GANG serial number burning problem: Does MSP-GANG have the function of burning serial numbers? This is not only for F5X F6X series MCUs, but also for F2X series and F1X series. Is there any solution? It can be used to set the compositio...; fish001 Microcontroller MCU

Circuit Design Based on Operational Amplifiers and Analog Integrated Circuits Answer Key and Errata: Circuit design based on operational amplifiers and analog integrated circuits...; lixiaohai8211 Analog electronics

MSP430 interrupt priority, open and close, interrupt nesting: The priority order from high to low is: PORT2_VECTOR (1 * 2u) /* 0xFFE2 Port 2 */ PORT1_VECTOR (4 * 2u) /* 0xFFE8 Port 1 */ TIMERA1_VECTOR (5 * 2u) /* 0xFFEA Timer A CC1-2, TA */ TIMERA0_VECTOR (6 * 2...; fish001 Microcontroller MCU

I wonder how the Dujiangyan system is developing now?: I used to see the author's statement on various forums, but it's rare recently. There are too many forums with partitions, which is not conducive to professional promotion. I have also done similar fl...; Wince.Android Real-time operating system RTOS

DB SDK mobile SMS application engine for fund company management application case: Providing different client application systems and the high standard requirements of fund companies, DB-SDK ([url=http://sdk.emay.cn/]http://sdk.emay.cn/[/url] ) SMS application engine can achieve tha...; 27018352 RF/Wirelessly

Shortcut: S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 SA SB SC SD SE SF SG SH SI SJ SK SL SM SN SO SP SQ SR SS ST SU SV SW SX SY SZ T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 TA TB TC TD TE TF TG TH TI TJ TK TL TM TN TO TP TQ TR TS TT TU TV TW TX TY TZ U0 U1 U2 U3 U4 U6 U7 U8 UA UB UC UD UE UF UG UH UI UJ UK UL UM UN UP UQ UR US UT UU UV UW UX UZ V0 V1 V2 V3 V4 V5 V6 V7 V8 V9 VA VB VC VD VE VF VG VH VI VJ VK VL VM VN VO VP VQ VR VS VT VU VV VW VX VY VZ W0 W1 W2 W3 W4 W5 W6 W7 W8 W9 WA WB WC WD WE WF WG WH WI WJ WK WL WM WN WO WP WR WS WT WU WV WW WY X0 X1 X2 X3 X4 X5 X7 X8 X9 XA XB XC XD XE XF XG XH XK XL XM XN XO XP XQ XR XS XT XU XV XW XX XY XZ Y0 Y1 Y2 Y4 Y5 Y6 Y9 YA YB YC YD YE YF YG YH YK YL YM YN YP YQ YR YS YT YX Z0 Z1 Z2 Z3 Z4 Z5 Z6 Z8 ZA ZB ZC ZD ZE ZF ZG ZH ZJ ZL ZM ZN ZP ZR ZS ZT ZU ZV ZW ZX ZY

Popular Components