ATF22LV10C-10PC datasheet, PDF

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ATF22LV10C-10PC: DescriptionSPLD - Simple Programmable Logic Devices 500 GATE STANDARD POWER 3.3V - 10NS; CategoryProgrammable logic devices Programmable logic; File Size2MB，19 Pages; ManufacturerAtmel (Microchip)

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ATF22LV10C-10PC Overview

SPLD - Simple Programmable Logic Devices 500 GATE STANDARD POWER 3.3V - 10NS

ATF22LV10C-10PC Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Atmel (Microchip)
Parts packaging code	DIP
package instruction	DIP, DIP24,.3
Contacts	24
Reach Compliance Code	compliant
Other features	10 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK
Architecture	PAL-TYPE
maximum clock frequency	71.4 MHz
JESD-30 code	R-PDIP-T24
JESD-609 code	e0
length	31.877 mm
Humidity sensitivity level	1
Dedicated input times	10
Number of I/O lines	10
Number of entries	22
Output times	10
Number of product terms	132
Number of terminals	24
Maximum operating temperature	70 °C
Minimum operating temperature
organize	10 DEDICATED INPUTS, 10 I/O
Output function	MACROCELL
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Encapsulate equivalent code	DIP24,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	225
power supply	3.3/5 V
Programmable logic type	FLASH PLD
propagation delay	10 ns
Certification status	Not Qualified
Maximum seat height	5.334 mm
Maximum supply voltage	5.5 V
Minimum supply voltage	3 V
Nominal supply voltage	3.3 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	7.62 mm

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Features

•

3.0V to 5.5V Operating Range

Advanced Low-voltage Electrically-erasable Programmable Logic Device

User-controlled Power-down Pin Option

Pin-controlled Standby Power (10µA Typical)

Well-suited for Battery Powered Systems

10ns Maximum Propagation Delay

CMOS and TTL Compatible Inputs and Outputs

Latch Feature Hold Inputs to Previous Logic States

Advanced Electrically-erasable Technology

– Reprogrammable

– 100% Tested

High-reliability CMOS Process

– 20 year Data Retention

– 100 Erase/Write Cycles

– 2,000V ESD Protection

– 200mA Latchup Immunity

Industrial Temperature Ranges

Dual-in-line and Surface Mount Packages in Standard Pinouts

Inputs are 5V Tolerant

Green Package Options (Pb/Halide-free/RoHS Compliant) Available

Applcations include Glue logic for 3.3V systems, DMA Control, State Machine Control,

Graphics processing

•

High-performance

Electrically

Erasable

Programmable

Logic Device

Atmel ATF22LV10C

See separate datasheet for Atmel

ATF22LV10C(Q)Z option

•

Description

The Atmel

ATF22LV10C is a high-performance CMOS (electrically erasable) pro-

grammable logic device (PLD) that utilizes the Atmel proven electrically erasable

Flash memory technology. Speeds down to 10ns and power dissipation as low as

10mA are offered. All speed ranges are specified over the 3.0V to 5.5V range for

industrial and commercial temperature ranges.

The ATF22LV10C provides a low-voltage and user controlled “zero” power CMOS

PLD solution. A user-controlled power-down feature offers “zero” (10

µA

typical)

standby power. This feature allows the user to manage total system power to meet

specific application requirements and enhance reliability, all without sacrificing speed.

(The Atmel ATF22LV10CQZ provides edge-sensing “zero” standby power (3

µA

typi-

cal), as well as low voltage operation. See the ATF22LV10CQZ datasheet.)

The ATF22LV10C is capable of operating at supply voltages down to 3.0V. When the

power-down pin is active, the device is placed into a zero standby power-down mode.

When the power-down pin is not used or active, the device operates in a full power

low voltage mode. Pin “keeper” circuits on input and output pins hold pins to their pre-

vious logic levels when idle, which eliminate static power consumed by pull-up

resistors.

The ATF22LV10C macrocell incorporates a variable product term architecture. Each

output is allocated from 8 to 16 product terms which allows highly-complex logic func-

tions to be realized. Two additional product terms are included to provide synchronous

reset and asynchronous reset. These additional product terms are common to all ten

registers and are automatically cleared upon power-up. Register preload simplifies

testing. A security fuse prevents unauthorized copying of programmed fuse patterns.

0780M–PLD–7/10

ATF22LV10C-10PC Related Products

	ATF22LV10C-10PC	ATF22LV10C-15PC	ATF22LV10C-15SC	ATF22LV10C-15SI	ATF22LV10C-10PI
Description	SPLD - Simple Programmable Logic Devices 500 GATE STANDARD POWER 3.3V - 10NS	SPLD - Simple Programmable Logic Devices 500 GATE STANDARD POWER 3.3V - 15NS	SPLD - Simple Programmable Logic Devices 500 GATE STANDARD POWER 3.3V - 15NS	SPLD - Simple Programmable Logic Devices EEPLD 500GATE STDPWR 3.3V 15NS IND TEMP	SPLD - Simple Programmable Logic Devices EEPLD 500GATE STDPWR 3.3V 10NS IND TEMP
Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible	incompatible
Parts packaging code	DIP	DIP	SOIC	SOIC	DIP
package instruction	DIP, DIP24,.3	DIP, DIP24,.3	SOP, SOP24,.4	0.300 INCH, PLASTIC, SOIC-24	DIP, DIP24,.3
Contacts	24	24	24	24	24
Reach Compliance Code	compliant	compliant	compliant	unknown	compliant
Other features	10 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK	10 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK	10 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK	10 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK	10 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK
Architecture	PAL-TYPE	PAL-TYPE	PAL-TYPE	PAL-TYPE	PAL-TYPE
maximum clock frequency	71.4 MHz	45.5 MHz	45.5 MHz	45.5 MHz	71.4 MHz
JESD-30 code	R-PDIP-T24	R-PDIP-T24	R-PDSO-G24	R-PDSO-G24	R-PDIP-T24
JESD-609 code	e0	e0	e0	e0	e0
length	31.877 mm	31.877 mm	15.4 mm	15.4 mm	31.877 mm
Humidity sensitivity level	1	1	2	2	1
Dedicated input times	10	10	10	10	10
Number of I/O lines	10	10	10	10	10
Number of entries	22	22	22	22	22
Output times	10	10	10	10	10
Number of product terms	132	132	132	132	132
Number of terminals	24	24	24	24	24
Maximum operating temperature	70 °C	70 °C	70 °C	85 °C	85 °C
organize	10 DEDICATED INPUTS, 10 I/O	10 DEDICATED INPUTS, 10 I/O	10 DEDICATED INPUTS, 10 I/O	10 DEDICATED INPUTS, 10 I/O	10 DEDICATED INPUTS, 10 I/O
Output function	MACROCELL	MACROCELL	MACROCELL	MACROCELL	MACROCELL
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	DIP	DIP	SOP	SOP	DIP
Encapsulate equivalent code	DIP24,.3	DIP24,.3	SOP24,.4	SOP24,.4	DIP24,.3
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	IN-LINE	IN-LINE	SMALL OUTLINE	SMALL OUTLINE	IN-LINE
Peak Reflow Temperature (Celsius)	225	225	240	240	225
power supply	3.3/5 V	3.3/5 V	3.3/5 V	3.3/5 V	3.3/5 V
Programmable logic type	FLASH PLD	FLASH PLD	FLASH PLD	FLASH PLD	FLASH PLD
propagation delay	10 ns	15 ns	15 ns	15 ns	10 ns
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	5.334 mm	5.334 mm	2.65 mm	2.65 mm	5.334 mm
Maximum supply voltage	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage	3 V	3 V	3 V	3 V	3 V
Nominal supply voltage	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	NO	NO	YES	YES	NO
technology	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	INDUSTRIAL	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE	THROUGH-HOLE	GULL WING	GULL WING	THROUGH-HOLE
Terminal pitch	2.54 mm	2.54 mm	1.27 mm	1.27 mm	2.54 mm
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	30	30	30	30	30
width	7.62 mm	7.62 mm	7.5 mm	7.5 mm	7.62 mm
Base Number Matches	-	1	1	1	-

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