Universal DVB Demodulator for DVB-T2/C2/S2/T/C/S
Description
The Si2164 integrates digital demodulators for all of the first and
second generation DVB video broadcasting standards (DVB-T2/
C2/S2/T/C/S) in a single advanced CMOS die. Leveraging Silicon
Labs' proven digital demodulation architecture, the Si2164
achieves excellent reception performance for each media while
significantly minimizing front-end design complexity, cost, and
power dissipation. Connecting the Si2164 to a terrestrial and cable
hybrid TV tuner or digital only tuner, such as Silicon Labs' Si2178/
58/48 devices, results in a high-performance and cost optimized
TV front-end solution.
Silicon Labs' internally developed DVB-C2 demodulator can
accept a standard IF (36 MHz) or low-IF input (differential) and
support all modes specified by the DVB-C2 standard. The main
features of the DVB-C2 mode are 4096-QAM, 6 or 8 MHz
bandwidth, management of notch insertion (broadband and
narrowband), and support of multiple data slices and PLPs.
DVB-T/T2, DVB-S/S2 and DVB-C demodulators are enhanced
versions of proven and broadly-used Silicon Labs Si2169/68/67/66
devices. DVB-T2-Lite (ETSI EN 302 755-V1.3.1) compatibility is
also supported as an added feature to the DVB-T2 standard.
The satellite demodulation functionality allows demodulating
widely deployed DVB-S, DIRECTV
TM
(DSS) legacy standards,
and new generation DVB-S2 (AMC compliant) satellite
broadcasts. A zero-IF interface (differential) allows for a seamless
connection to market proven satellite silicon tuners. Si2164
embeds DiSEqC
TM
2.0 LNB interface for satellite dish control and
an equalizer to compensate for echoes in long cable feeds from
antenna to the satellite tuner input.
The cable demodulation functionality allows demodulating widely
deployed DVB-C legacy standard (ITU J.83 Annex A/C) and
Americas' cable standard (ITU J.83 Annex B).
The Si2164 offers an on-chip blind scan algorithm for DVB-S/S2
and DVB-C/C2 standards, as well as a blind lock function. The
Si2164 programmable transport stream output interface provides a
flexible range of output modes and is fully compatible with all
MPEG decoders or conditional access modules to support any
customer application.
DISEQC_OUT
Si2164
Features
-
DVB-C2 (ETSI EN 302 769)
-
16-QAM to 4096-QAM OFDM demodulation
-
6 MHz and 8 MHz bandwidth
-
Notch management
-
DVB-T2 (ETSI EN 302 755-V1.3.1) with T2-Lite (Annex I)
-
Bandwidth: 1.7, 5, 6, 7, or 8 MHz and extended BW
-
Supports up to 255 PLPs
-
FEF management
-
NorDig Unified 2.4 and D-Book 7 V2 compliant
-
DVB-S2 (ETSI EN 302 307 and TR102-376)
-
QPSK/8PSK demodulator
-
1 to 45 MSymbol/s
-
DVB-C (ETSI EN 300 429) and ITU J.83 Annex A/B/C
-
QAM demodulator and FEC decoder
-
1 to 7.2 MSymbol/s
-
DVB-T (ETSI EN 300 744)
-
OFDM demodulator and enhanced FEC decoder
-
NorDig Unified 2.4 and D-Book 7 V2 compliant
-
DVB-S and DSS
-
QPSK demodulator and enhanced FEC decoder
-
1 to 45 MSymbol/s
-
LDPC and BCH FEC decoding for C2/T2 and S2 standards
-
I
2
C serial bus interfaces (master and host)
-
Firmware control for upgradeability
-
Flexible TS output interface (serial, parallel, and slave)
-
DiSEqC
TM
2.0 interface and Unicable support for satellite
-
Fast lock times for all media including DVB-C2 and DVB-T2
-
Low power consumption
-
Two power supplies: 1.2 and 3.3 V
-
7x7 mm, QFN-48 pin package, Pb-free/RoHS compliant
-
Pin-to-pin and API compliant with Si2166/67/68/69/60/62 Sili-
Applications
con Labs' devices
-
iDTV: on-board design or in a NIM
-
Advanced multimedia STB, PVR, and Blu-ray recorder
-
PC-TV accessories
1.2, 3.3V
RESETB
GPIO_0
GPIO
TS_ERR/
GPIO_1
INTERFACE
MPEG TS
EQUAL-
IZER
VITERBI
RS
TS_SYNC
TS_VAL
TS_CLK
TS_DATA
8
DISEQC_IN
DiSEqC
TM
2.0
QPSK / 8PSK
S_ADC_IP
S_ADC_IN
S_ADC_QP
S_ADC_QN
MP_C/_D (Sat.)
MP_A/_B (T & C)
TC_ADC_P
TC_ADC_N
Ext. Clk or Xtal
DSP &
SYNCHRO
nPSK
QAM
DEMOD
CTRL
AGCs
OFDM
DEMOD
EQUAL-
IZER
LDPC
BCH
Silicon Labs
(Si217x/5x/4x)
ADC
OSC
& PLL
DVB-T2/T/C2/C/S2/S
FEC MODULE
TV Tuner
Si2164
HOST_SDA
HOST_SCL
CLK_IN_OUT
TUN_SDA
TUN_SCL
I
2
C
SWITCH
I
2
C
I/F
Digital Demodulator
Copyright © 2013 by Silicon Laboratories
HDTV MPEG S.o.C.
Satellite
ZIF Tuner
ADC (I)
ADC (Q)
FRONT
END
8.20.2013
Universal DVB Demodulator for DVB-T2/C2/S2/T/C/S
Selected Electrical Specifications
(T
A
= –10 to 75 °C)
Parameter
General
Input clock reference
Supported XTAL frequency
DVB-T2
1
DVB-T
2
Total power consumption
DVB-C2
3
DVB-C
4
DVB-S2
5
DVB-S
6
Thermal resistance
Power Supplies
V
DD
_
VCORE
V
DD
_
VANA
V
DD
_
VIO
1.14
3.00
3.00
1.20
3.30
3.30
1.30
3.60
3.60
V
V
V
2 layer PCB
4 layer PCB
4
16
—
—
—
—
—
—
—
—
—
—
420
190
350
180
480
240
35
23
30
30
—
—
—
—
—
—
—
—
MHz
MHz
mW
mW
mW
mW
mW
mW
°C/W
°C/W
Test Condition
Min
Typ
Max
Unit
Si2164
Notes:
1.
Test conditions : 8 MHz, 256-QAM, 32K FFT, CR = 3/5, GI = 1/128, PP7, parallel TS, C/N at picture failure.
2.
Test conditions : 8 MHz, IF mode, 8K FFT, 64-QAM, parallel TS.
3.
Test conditions : 4096-QAM, CR = 5/6, GI = 1/128, C/N = 34 dB (at picture failure).
4.
Test conditions : 6.9 Mbaud, IF mode, 256-QAM, parallel TS.
5.
Test conditions : 32 Mbaud, CR = 3/5, 8PSK, pilots On, parallel TS, C/N at picture failure (PER = 10
–4
).
6.
Test conditions : 30 Mbaud, CR = 7/8, parallel TS, at QEF: BER = 2 x 10
–4
.
Pin Assignments
TS_ERR/GPIO_1
26
XTAL_I/CLK_IN
VDD_VCORE
TS_DATA[7]
25
24 TS_DATA[6]
23 TS_DATA[5]
22 VDD_VIO
21 GND
20 VDD_VCORE
19 TS_DATA[4]
18 TS_DATA[3]
17 TS_DATA[2]
16 TS_DATA[1]
15 TS_DATA[0]/TS_SER
14 TS_CLK
13 TS_SYNC
1
MP_A
2
MP_B
3
GPIO_0
4
DISEQC_CMD
5
DISEQC_IN
6
DISEQC_OUT
7
VDD_VCORE
8
GND
9
VDD_VIO
10
SCL_HOST
11
SDA_HOST
12
TS_VAL
VDD_VANA
RESETB
XTAL_O
ADDR
MP_D
MP_C
GND
GND
27
36
S_ADC_IP 37
S_ADC_IN 38
S_ADC_QP 39
S_ADC_QN 40
TC_ADC_P 41
TC_ADC_N 42
NC 43
CLK_IN_OUT 44
SDA_MAST 45
SCL_MAST 46
GND 47
VDD_VCORE 48
35
34
33
32
31
30
29
28
Si2164
(GND_PAD)
QFN-48
7x7mm
Selection Guide
Part Number
Si2164-A40-GM
Digital Demodulator
Description
Universal DVB Demodulator for DVB-T2/C2/S2/T/C/S, 7x7 mm QFN-48
Copyright © 2013 by Silicon Laboratories
8.20.2013
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