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MMBF5461

Description
P-CHANNEL, Si, SMALL SIGNAL, JFET
CategoryDiscrete semiconductor    The transistor   
File Size500KB,12 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
Environmental Compliance
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MMBF5461 Overview

P-CHANNEL, Si, SMALL SIGNAL, JFET

MMBF5461 Parametric

Parameter NameAttribute value
Brand NameFairchild Semiconduc
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerFairchild
Parts packaging codeSOT-23
package instructionSMALL OUTLINE, R-PDSO-G3
Contacts3
Manufacturer packaging code3LD, SOT23, JEDEC TO-236, LOW PROFILE
Reach Compliance Codecompli
ECCN codeEAR99
ConfigurationSINGLE
FET technologyJUNCTION
Maximum feedback capacitance (Crss)2 pF
JESD-30 codeR-PDSO-G3
JESD-609 codee3
Humidity sensitivity level1
Number of components1
Number of terminals3
Operating modeDEPLETION MODE
Maximum operating temperature150 °C
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)260
Polarity/channel typeP-CHANNEL
Maximum power dissipation(Abs)0.35 W
Certification statusNot Qualified
surface mountYES
Terminal surfaceMatte Tin (Sn)
Terminal formGULL WING
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
transistor applicationsAMPLIFIER
Transistor component materialsSILICON
2N5460 / 2N5461 / 2N5462 / MMBF5460 / MMBF5461
Discrete POWER & Signal
Technologies
2N5460
2N5461
2N5462
MMBF5460
MMBF5461
G
D
G
S
TO-92
D
SOT-23
Mark: 6E / 61U
S
P-Channel General Purpose Amplifier
This device is designed primarily for low level audio and general
purpose applications with high impedance signal sources. Sourced
from Process 89.
Absolute Maximum Ratings*
-
TA = 25°C unless otherwise noted
Symbol
V
DG
V
GS
I
GF
T
J
,T
stg
Drain-Gate Voltage
Gate-Source Voltage
Forward Gate Current
Parameter
Value
- 40
40
10
-55 to +150
Units
V
V
mA
°C
Operating and Storage Junction Temperature Range
*
These ratings are limiting values above which the serviceability of any semiconductor device may be impaired.
NOTES:
1)
These ratings are based on a maximum junction temperature of 150 degrees C.
2)
These are steady state limits. The factory should be consulted on applications involving pulsed or low duty cycle operations.
Thermal Characteristics
Symbol
P
D
R
θJC
R
θJA
TA = 25°C unless otherwise noted
Characteristic
Total Device Dissipation
Derate above 25°C
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
2N5460
625
5.0
83.3
200
Max
*MMBF5460
350
2.8
357
Units
mW
mW/°C
°C/W
°C/W
*
Device mounted on FR-4 PCB 1.6" X 1.6" X 0.06."
ã
1997 Fairchild Semiconductor Corporation

MMBF5461 Related Products

MMBF5461 2N5460 2N5461
Description P-CHANNEL, Si, SMALL SIGNAL, JFET P-CHANNEL, Si, SMALL SIGNAL, JFET, TO-92 P-CHANNEL, Si, SMALL SIGNAL, JFET, TO-92
Brand Name Fairchild Semiconduc Fairchild Semiconduc Fairchild Semiconduc
Is it lead-free? Lead free Lead free Lead free
Is it Rohs certified? conform to conform to conform to
Parts packaging code SOT-23 TO-92 TO-92
package instruction SMALL OUTLINE, R-PDSO-G3 CYLINDRICAL, O-PBCY-T3 CYLINDRICAL, O-PBCY-T3
Contacts 3 3 3
Manufacturer packaging code 3LD, SOT23, JEDEC TO-236, LOW PROFILE 3LD, TO-92, MOLDED, STD STRAIGHT LD (NO EOL CODE) 3LD, TO-92, MOLDED, STD STRAIGHT LD (NO EOL CODE)
Reach Compliance Code compli unknow compli
ECCN code EAR99 EAR99 EAR99
Configuration SINGLE SINGLE SINGLE
FET technology JUNCTION JUNCTION JUNCTION
Maximum feedback capacitance (Crss) 2 pF 2 pF 2 pF
JESD-30 code R-PDSO-G3 O-PBCY-T3 O-PBCY-T3
JESD-609 code e3 e3 e1
Number of components 1 1 1
Number of terminals 3 3 3
Operating mode DEPLETION MODE DEPLETION MODE DEPLETION MODE
Maximum operating temperature 150 °C 150 °C 150 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
Package shape RECTANGULAR ROUND ROUND
Package form SMALL OUTLINE CYLINDRICAL CYLINDRICAL
Peak Reflow Temperature (Celsius) 260 NOT APPLICABLE NOT APPLICABLE
Polarity/channel type P-CHANNEL P-CHANNEL P-CHANNEL
Maximum power dissipation(Abs) 0.35 W 0.31 W 0.31 W
Certification status Not Qualified Not Qualified Not Qualified
surface mount YES NO NO
Terminal surface Matte Tin (Sn) Matte Tin (Sn) Tin/Silver/Copper (Sn/Ag/Cu)
Terminal form GULL WING THROUGH-HOLE THROUGH-HOLE
Terminal location DUAL BOTTOM BOTTOM
Maximum time at peak reflow temperature NOT SPECIFIED NOT APPLICABLE NOT APPLICABLE
transistor applications AMPLIFIER AMPLIFIER AMPLIFIER
Transistor component materials SILICON SILICON SILICON
Maker Fairchild Fairchild -
JEDEC-95 code - TO-92 TO-92

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