Si9161
Vishay Siliconix
Si9161
Optimized-Efficiency Controller for RF Power
Amplifier Boost Converter
FEATURES
• Si9160 architecture optimized for “light-load” efficiency
• High Frequency Switching (up to 2 MHz)
• Optimized Output Drive Current (300 mA)
• Standby Mode
• Wide Bandwidth Feedback Amplifier
• Single-Cell LiIon and Three-cell NiCd or NiMH Operation
DESCRIPTION
The Si9161 Optimized-Efficiency Controller for RF Power
Amplifier Boost Converter is a fixed-frequency, pulse- width-
modulated power conversion controller designed for use with
the Si6801 application specific MOSFET. The Si9161 and the
Si6801 are optimized for high efficiency switched-mode power
conversion at 1 MHz and over. The device has an enable pin
which can be used to put the converter in a low-current mode
compatible with the standby mode of most cellular phones. It
has a light-load pin which enables circuitry optimizing
efficiency at loads typical of receive operation. A wide
bandwidth feedback amplifier minimizes transient response
time allowing the device to meet the instantaneous current
demands of today’s digital protocols. The input voltage range
accommodates minimal size and cost battery pack
configurations.
Frequency control in switching is important to noise
management techniques in RF communications. The Si9161
is easily synchronized for high efficiency power conversion at
frequencies in excess of 1 MHz.
Optimizing the controller and the synchronous FETs results in
the highest conversion efficiency over a wide load range at the
switching frequencies of interest (1 MHz or greater). It also
minimizes the overshoot and gate ringing associated with
drive current and gate charge mismatches.
When disabled, the converter requires less than 330 µA. This
capability minimizes the impact of the converter on battery life
when the phone is in the standby mode.
Finally, operating voltage is optimized for LiIon battery
operation (2.7 V to 4.5 V) and can also be used with three-cell
NiCd or NiMH (3 V to 3.6 V), as well as four-cell NiCd or NiMH
(4 V to 4.8 V) battery packs.
APPLICATION CIRCUIT
FaxBack 408-970-5600, request 70747
www.siliconix.com
S-60752—Rev. B, 05-Apr-99
1
Si9161
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
Voltages Referenced to GND.
V
DD
, V
S
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
P
GND
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±0.3 V
Linear Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to V
DD
+0.3 V
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to V
DD
+0.3 V
Peak Output Drive Current . . . . . . . . . . . . . . . . . . . . . . . . . . . 350 mA
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . -65 to 150°C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Power Dissipation (Package)
a
16-Pin TSSOP (Q Suffix)
a, b
. . . . . . . . . . . . . . . . . . . . . . . . . 925 mW
Thermal Impedance (Θ
JA
)
a
16-Pin TSSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .135°C/W
Notes
a. Device mounted with all leads soldered or welded to PC board.
b. Derate 7.4 mW/°C above 25°C.
Exposure to Absolute Maximum rating conditions for extended periods may affect device reliability. Stresses above Absolute Maximum rating may cause permanent
damage. Functional operation at conditions other than the operating conditions specified is not implied. Only one Absolute Maximum rating should be applied at any
one time.
SPECIFICATIONS
Limits
Test Conditions
Unless Otherwise Specified
a
Parameter
Reference
Output Voltage
V
REF
I
REF
= -10 µA
TA = 25°C
1.455
1.477
1.50
1.545
1.523
V
B Suffix -25 to 85°C
LL = V
DD
, 2.7 V
≤
V
DD
, V
S
≤
6.0 V, GND = P
GND
Symbol
Min
b
Typ
Max
b
Unit
Oscillator
Maximum Frequency
c
Oscillator Frequency
Accuracy
R
OSC
Peak Voltage
Voltage Stability
c
Temperature Stability
c
Light-Load Frequency
c
V
ROSC
∆f/f
f
LL
4 V
≤
V
DD
≤
6 V, Ref to 5 V, T
A
= 25°C
Referenced to 25°C
LL = 0 V, C
OSC
= 100 pf, R
OSC
= 7.0 kΩ
-8
±5
115
f
MAX
V
DD
= 5 V, C
OSC
= 47 pF, R
OSC
= 5.0 kΩ
V
DD
= 3.0 V, f
OSC
= 1 MHz (nominal)
C
OSC
= 100 pF, R
OSC
= 7.0 kΩ, T
A
= 25°C
2.0
-15
1.0
8
15
MHz
%
V
%
kHz
Error Amplifier (C
OSC
= GND, OSC Disabled)
Input Bias Current
Open Loop Voltage Gain
Offset Voltage
Unity Gain Bandwidth
Output Current
Power Supply Rejection
c
c
I
B
A
VOL
V
OS
BW
I
OUT
PSRR
V
NI
= V
REF
, V
FB
= 1.0 V
V
NI
= V
REF
Source (V
FB
= 1 V, NI = V
REF
)
Sink (V
FB
= 2 V, NI = V
REF
)
4 V < V
DD
< 6 V
-1.0
47
-15
55
0
10
-2.0
0.4
0.8
60
1.0
µA
dB
15
mV
MHz
-1.0
mA
dB
UVLO
SET
Voltage Monitor
Under Voltage Lockout
Hysteresis
UVLO Input Current
V
UVLOHL
V
UVLOLH
V
HYS
I
UVLO(SET)
UVLO
SET
High to Low
UVLO
SET
Low to High
V
UVLOLH
- V
UVLOHL
V
UVLO
= 0 to V
DD
-100
0.85
1.0
1.2
200
100
1.15
V
mV
nA
S-60752—Rev. B, 05-Apr-99
2
FaxBack 408-970-5600, request 70747
www.siliconix.com
Si9161
Vishay Siliconix
SPECIFICATIONS
Limits
Test Conditions
Unless Otherwise Specified
a
Parameter
Output Drive (D
R
and D
S
)
Output High Voltage
Output Low Voltage
Peak Source Output Current
Peak Sink Output Current
Break-Before-Make
V
OH
V
OL
I
SOURCE
I
SINK
t
BBM
V
DD
= 2.7 V
V
S
= 5.3 V
V
DD
= 2.7 V
V
DD
= 6.0 V
I
OUT
= -10
mA
I
OUT
= 10 mA
V
S
= 5.3 V
V
S
= 5.3 V
250
5.15
5.2
0.06
-300
300
40
0.15
-250
mA
ns
V
B Suffix -25 to 85°C
LL = V
DD
, 2.7 V
≤
V
DD
, V
S
≤
6.0 V, GND = P
GND
Symbol
Min
b
Typ
Max
b
Unit
Logic
ENABLE Delay to Output
ENABLE Logic Low
ENABLE Logic High
ENABLE Input Current
Light Load Delay to Output
Light Load Logic Low
Light Load Logic High
Light Load Input Current
c
td
EN
V
ENL
V
ENH
I
EN
td
LL
V
LLL
V
LLH
I
LL
ENABLE Rising to OUTPUT, V
DD
= 6.0 V
0.8 V
DD
ENABLE = 0 to V
DD
Light Load Falling to OUTPUTS
-1.0
1.4
0.2 V
DD
1.0
1.4
0.8
2.4
µs
V
µA
µs
V
µA
LL = 0 to V
DD
-1.0
1.0
Duty Cycle
Maximum Duty Cycle
D
MAX
/SS Input Current
CYCLE
MAX
I
DMAX
V
DD
= 6.0 V
D
MAX
= 0 to V
DD
-100
80
95
100
%
nA
Supply
Supply Current—Normal
Mode
Supply Current—Standby
Mode
Notes
a. C
STRAY
< 5 pF on C
OSC
. After Start-Up, V
DD
of
≥
3 V.
b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
c. Guaranteed by design, not subject to production testing.
No Load, V
LL
= 0 to V
DD
f
OSC
= 1 MHz, R
OSC
= 7.0 kΩ
ENABLE = Low
V
DD
= 2.7 V
V
DD
= 4.5 V
1.1
1.6
250
1.5
2.3
330
mA
µA
I
DD
FaxBack 408-970-5600, request 70747
www.siliconix.com
S-60752—Rev. B, 05-Apr-99
3
Real-time operating system RTOS
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