IA3222/3223-EVB
IA3222/3223 D
E MO
B
OA RD
Description
The IA3222/3223 Demo Board is a typical application
circuit that exhibits all the features of the IA3222/3223
chipset. The chipset can be programmed by software to
pass PTT certification worldwide. The integrated V.92
DAA offers an easy-to-use analog interface with an
internal or external dc reference for seamless
interfacing to a variety of systems. It allows easy
building-block integration where audio codecs are either
separate or integrated into DSPs. It is also ideal for non-
modem systems requiring isolated DAAs, such as alarm
systems, VoIP, and PBX FXO interfaces.
The CPLD interposer allows stand-alone evaluation of
the chipset. This simple circuit takes the place of a
microcontroller that would normally send off-hook
commands and other settings to the IA3223's serial
port. Instead of having to program a microcontroller, the
user may control the IA3223's registers using manual
switches.
AND
C P L D I
N T E R P O S E R
U
S E R
’
S
G
UIDE
Features
Programmable worldwide telecom compliance with
one hardware build
V.92 (56 kbps) performance
Virtually unlimited high-voltage insulation
Highly-competitive BOM cost
Lowest pin count (26) chipset
High common-mode RF immunity without costly
filtering
Continuous dc and audio snooping with >5 M Tip
to Ring
Parallel pick-up, line-in-use, ring, and "911" detection
–86 dBm receiver noise floor
+3 dBm transmit power
Micropower line-side device powered from line
120 dB Caller ID common-mode rejection
Rev. 0.1 3/10
Copyright © 2010 by Silicon Laboratories
IA3222/3223-EVB
IA3222/3223-EVB
1. IA3222/3223 Demo Board Photographs
Figure 1. IA3222/3223 Demo Board
Figure 2. CPLD Interposer
2
Preliminary Rev. 0.1
IA3222/3223-EVB
Figure 3. Demo Board and Interposer
Preliminary Rev. 0.1
3
IA3222/3223-EVB
2. Getting Started
The Interposer Board's simplified silkscreen is shown in Figure 4. Refer to the schematic for connector pinouts.
J4
Figure 4. Interposer Board Simplified Silkscreen
The board must be powered using 3.3 V through J3 according to the polarity indicated on the silkscreen. The DAA
Demo Board must be plugged into connector J2 on the Interposer as shown in Figure 3. The DAA Modem Side is
powered via the Interposer.
Table 1 lists the DAA registers, which can be programmed via DIP switch banks on the Interposer Board. A
complete description of these registers can be found in the IA3222/3223 data sheet.
Table 1. DAA Registers
A2
0
0
0
0
1
1
1
A1
0
0
1
1
0
0
1
A0
0
1
0
1
0
1
X
Register
Control
Line Side programming
Line Side programming
Thresholds
Line status (read only)
Dividers
Reserved
D3
OFH
LP5
LP1
LTH1
RNG/PPU
Reserved
Reserved
D2
LSR
LP4
LP0
LTH0
LIU/LDN
F2
Reserved
D1
SGAIN
LP3
ECHO
RTH1
LSTAT
F1
Reserved
D0
PWD
LP2
REVID
RTH0
LP
F0
Reserved
In order to program the DAA, the corresponding DIP switches must be set to the desired state; then, switch SW5
must be set to the momentary "write" position. Every push of SW5 makes the CPLD write all the DAA's read/write
registers based on the current state of the DIP switches.
The line-status register and the ECHO bit in the Line-Side LSB register are read-only. If switch SW4 is set to "read,"
those read-only bits are monitored continuously and updated onto the LEDs. An LED turned on means a high
state.
4
Preliminary Rev. 0.1
IA3222/3223-EVB
2.1. J1 Connector Pinout for the IA3222/3223 Demo Board
Table 2. J1 Connector Pin Descriptions*
Pin #
1, 2
3, 4
5, 6
7, 8
9, 10
11, 12
13, 14
15, 16
17, 18
19, 20
21
22
Name
Extclk
SClk
CS
SDIN
VDD
TX
ACREF
LINESTATUS
SDOUT
RX
GND
GND
Type
Input
input
Input
Input
Power
Input
Input/Output
Output
Output
Output
Power
Power
Description
Optional external clock input for codec
Serial data clock input from interposer board
Chip select from interposer board
Serial data input from interposer board
Power supply 3.3 V from interposer board
Transmit analog input
Analog ac reference
Line status
Serial data output (register read)
Receive analog output
Chassis ground
Signal and system ground
*Note:
See the IA3222/3223 data sheet for more information about differential or single-ended analog interfacing.
The ExtClk input can be used in order to synchronize the IA3222/3223 internal codecs with an external codec. This
helps prevent aliasing. Otherwise, the ExtClk input can be left open (there is an internal pull-down). The internal
oscillator must then be selected. Refer to the data sheet for internal or external clock register settings.
2.1.1. Jumper Setting
A single jumper is available on the IA3222/3223 Demo Board. When it is open, the state of the hook switch is
controlled by the serial port. When it is closed, the DAA goes off-hook regardless of the programmed hook-switch
state. If the Interposer is used, the jumper is not needed to go off-hook.
2.2. Automatic Operation
In order to evaluate the IA3222/3223 DAA chipset as a replacement of a DAA product with a static hook control
wire, the CPLD can recognize an active-high or active-low host command and produce the equivalent serial
command to the IA3223. The host command signal is to be connected on the Interposer board at the net named
tri_in, which is the common between R38 and R39. The leftmost switch of the SW1 bank (OFH) should be set to
the polarity of the hook command that corresponds to the off-hook state. If the off-hook command is active high,
OFH should be set to 1, and if the off-hook command is active low, OFH should be set to 0. At every transition of
the hook command (tri_in signal), all the IA3223 registers are loaded based on the state of the DIP switches and of
the hook command signal.
Manual operation is still possible with the hook command signal connected, but the meaning of the OFH DIP switch
differs between automatic and manual operation. When a transition of tri_in is detected, OFH indicates the polarity
of the off-hook command. When the write switch (SW5) is pushed momentarily, the state of OFH is copied to
IA3223 register 0, where a high level means off-hook, and a low level means on-hook.
Preliminary Rev. 0.1
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