Changes to Figure 21...................................................................... 13
Changes to Data Reading Options Section ................................. 18
8/10—Rev. 0 to Rev. A
Changes to Table 4, Conversion Time: CNV Rising Edge
to Data Available ................................................................................5
10/09—Revision 0: Initial Version
Rev. C | Page 2 of 28
Data Sheet
SPECIFICATIONS
AVDD = DVDD = 2.5 V, BVDD = 5 V, VIO = 1.8 V to 2.7 V, V
REF
= 4.096 V, T
A
= −40°C to +85°C, unless otherwise noted.
Table 2.
Parameter
RESOLUTION
ANALOG INPUT
Voltage Range
Absolute Input Voltage
Leakage Current at 25°C
Input Impedance
ACCURACY
No Missing Codes
Differential Nonlinearity Error, DNL
Integral Nonlinearity Error, INL
Transition Noise
Gain Error
2
Gain Error Temperature Drift
Zero Error
2
Zero Error Temperature Drift
Power Supply Sensitivity
3
THROUGHPUT
Conversion Rate
Transient Response
AC ACCURACY
3
Dynamic Range
Signal-to-Noise Ratio, SNR
Test Conditions/Comments
Min
14
0
−0.1
−0.1
Typ
Max
AD7944
Unit
Bits
V
V
V
nA
(IN+) − (IN−)
IN+
IN−
Acquisition phase
V
REF
V
REF
+ 0.1
+0.1
250
See the Analog Inputs section
14
−0.90
−1.00
T
MIN
to T
MAX
T
MIN
to T
MAX
AVDD = 2.5 V ± 5%
0
Full-scale step
V
REF
= 4.096 V, internal reference
V
REF
= 5.0 V, external reference
f
IN
= 20 kHz
V
REF
= 4.096 V, internal reference
V
REF
= 5.0 V, external reference
f
IN
= 20 kHz
f
IN
= 20 kHz, V
REF
= 4.096 V, internal
reference
f
IN
= 20 kHz, V
REF
= 4.096 V
83.5
84
83.5
84
−15
−0.65
±0.25
±0.25
0.4
±2
±0.8
±0.08
0.55
84.3
+0.90
+1.00
+15
+0.65
Bits
LSB
1
LSB
1
LSB
1
LSB
1
ppm/°C
mV
ppm/°C
dB
MSPS
ns
dB
dB
dB
dB
dB
dB
dB
2.5
100
84.5
85
84
84.5
103
−102
84
Spurious-Free Dynamic Range, SFDR
Total Harmonic Distortion, THD
Signal-to-Noise-and-Distortion Ratio,
SINAD
SAMPLING DYNAMICS
−3 dB Input Bandwidth
Aperture Delay
1
2
19
0.7
MHz
ns
LSB means least significant bit. With the 4.096 V input range, one LSB is 250 µV.
See the Terminology section. These specifications include full temperature range variation but not the error contribution from the external reference.
3
All specifications expressed in decibels are referred to a full-scale input FSR and tested with an input signal at 0.5 dB below full scale, unless otherwise specified.
Rev. C | Page 3 of 28
AD7944
Table 3.
Parameter
INTERNAL REFERENCE
Output Voltage
Temperature Drift
Line Regulation
Turn-On Settling Time
REFIN Output Voltage
REFIN Output Resistance
EXTERNAL REFERENCE
Voltage Range
Current Drain
REFERENCE BUFFER
REFIN Input Voltage
REFIN Input Current
DIGITAL INPUTS
Logic Levels
V
IL
V
IH
I
IL
I
IH
DIGITAL OUTPUTS
Data Format
Pipeline Delay
V
OL
V
OH
POWER SUPPLIES
AVDD, DVDD
BVDD
VIO
Standby Current
1, 2
Power Dissipation
With Internal Reference
With External Reference
TEMPERATURE RANGE
3
Specified Performance
1
2
Data Sheet
Test Conditions/Comments
PDREF is low
T
A
= 25°C
−40°C to +85°C
AVDD = 2.5 V ± 5%
C
REF
= 10 μF, C
REFIN
= 0.1 μF
REFIN at 25°C
PDREF is high, REFIN is low
2.4
500
1.2
160
5.1
V
µA
V
µA
Min
4.081
Typ
4.096
±10
±50
40
1.2
6
Max
4.111
Unit
V
ppm/°C
ppm/V
ms
V
kΩ
−0.3
0.9 × VIO
−1
−1
+0.1 × VIO
VIO + 0.3
+1
+1
V
V
µA
µA
I
SINK
= +500 µA
I
SOURCE
= −500 µA
Serial 14 bits, straight binary
Conversion results available immediately
after completed conversion
0.4
VIO − 0.3
2.375
4.75
1.8
2.5
5.0
2.5
1.0
28
25
15.5
12
−40
2.625
5.25
2.7
V
V
V
V
V
µA
mW
mW
mW
mW
°C
Specified performance
AVDD = DVDD = VIO = 2.5 V
2.5 MSPS throughput
2.0 MSPS throughput
2.5 MSPS throughput
2.0 MSPS throughput
T
MIN
to T
MAX
33
30
17
13
+85
With all digital inputs forced to VIO or GND as required.
During acquisition phase.
3
Contact an Analog Devices, Inc., sales representative for the extended temperature range.
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