July 2000
ML4426*
Bi-directional Sensorless BLDC Motor Controller
GENERAL DESCRIPTION
The ML4426 PWM motor controller provides all of the
functions necessary for starting and controlling the speed
of delta or wye wound Brushless DC (BLDC) motors
without Hall Effect sensors. Back EMF voltage is sensed
from the motor windings to determine the proper
commutation phase sequence using a PLL. This patented
sensing technique will commutate a wide range of 3-
Phase BLDC motors and is insensitive to PWM noise and
motor snubbing circuitry.
The ML4426 limits the motor current using a constant off-
time PWM control loop. The velocity loop is controlled
with an onboard amplifier. The ML4426 has circuitry to
ensure that there is no shoot-through in directly driven
external power MOSFETs.
The timing of the start-up sequence is determined by the
selection of three timing capacitors. This allows
optimization for a wide range of motors and loads.
FEATURES
s
Motor starts and stops with power to IC
s
Bi-directional motor drive for applications requiring forward/
reverse operation
s
On-board start sequence: Align
®
Ramp
®
Set Speed
s
Patented Back-EMF commutation technique provides jitterless
torque for minimum “spin-up” time
s
Onboard speed control loop
s
PLL used for commutation provides noise immunity from
PWM spikes, compared to noise sensitive zero crossing
technique
s
PWM control for maximum efficiency
s
Direct FET drive for 12V motors; drives high voltage motors
with IC buffers from IR, IXYS, Harris, Power Integrations,
Siliconix, etc.
(* Indicates Part Is End Of Life As Of July 1, 2000)
BLOCK DIAGRAM
(Pin Configuration Shown for 28 Pin Version)
17
VDD
750nA
FB A
22
FB B
23
FB C
24
BACK
EMF
SAMPLER
1.5V
–
+
CAT
750nA
VDD
19
CRT
–
21
CRR
20
SPEED CVCO
FB
15
16
RVCO
1.5V
+
VDD
500nA
VOLTAGE
CONTROLLED
OSCILLATOR
VCO/TACH
13
VCO
OUT
F/R
12
+
VCO
OUT
R
A
F
B
COMMUTATION
STATE MACHINE
HA
HB
GATING
LOGIC
&
OUTPUT
DRIVERS
UVLO
HC
LA
LB
LC
UV FAULT
4kΩ
REFERENCE
2
3
4
9
10
11
18
8
SPEED SET
5
SPEED COMP
–
3.9V
–
+
E
D
C
1.7V
6
CT
20kHz
1
ISENSE
1.7V
×
5
VREF
16kΩ
–
+
–
ILIMIT
1-SHOT
1.4V
VDD
+
8kΩ
26
CIOS
BRAKE
25
14
VDD
GND
28
27
RREF
7
VREF
1
ML4426
PIN CONFIGURATION
ML4426
28-Pin Narrow PDIP (P28N)
28-Pin SOIC (S28)
ISENSE
HA
HB
HC
SPEED COMP
CT
VREF
SPEED SET
LA
1
2
3
4
5
6
7
8
9
28
27
26
25
24
23
22
21
20
19
18
17
16
15
GND
RREF
CIOS
BRAKE
FB C
FB B
FB A
CRR
SPEED FB
CRT
UV FAULT
CAT
RVCO
CVCO
LB 10
LC 11
F/R 12
VCO/TACH 13
VDD 14
TOP VIEW
ML4425
32-Pin TQFP (H32-7)
ISENSE
BRAKE
GND
CIOS
RREF
HA
NC
HB
H3
NC
SPEED COMP
CT
VREF
SPEED SET
LA
LB
32 31 30 29 28 27 26 25
24
1
2
3
4
5
6
7
8
9
23
22
21
20
19
18
17
10 11 12 13 14 15 16
FB C
FB B
FB A
CRR
SPEED FB
CRT
UV FAULT
CAT
LC
VCO/TACH
VDD
NC
NC
CVCO
TOP VIEW
2
RVCO
F/R
ML4426
PIN DESCRIPTION
PIN
NAME
(Pin number in parenthesis is for TQFP package)
PIN
NAME
FUNCTION
FUNCTION
1(30)
I
SENSE
Motor current sense input. When
I
SENSE
exceeds 0.2
´
I
LIMIT,
the
output drivers LA, LB, and LC are
shut off for a fixed time
determined by C
IOS
Active low output driver for the
phase A high-side switch
Active low output driver for the
phase B high-side switch
Active low output driver for the
phase C high-side switch
17(17) C
AT
A capacitor to GND sets the time
that the controller stays in the
align mode
This output goes low when V
DD
drops below the UVLO threshold,
and indicates that all output
drivers have been disabled
A capacitor to GND sets the time
that the controller stays in the
ramp mode
Output of the back-EMF sampling
circuit and input to the VCO. An
RC network connected to SPEED
FB sets the compensation for the
PLL loop formed by the back-EMF
sampling circuit, the VCO, and
the commutation state machine
A capacitor to between C
RR
and
SPEED FB sets the ramp rate
(acceleration) of the motor when
the controller is in ramp mode
The motor feedback voltage from
phase A is monitored through a
resistor divider for back-EMF
sensing at this pin
The motor feedback voltage from
phase B is monitored through a
resistor divider for back-EMF
sensing at this pin
The motor feedback voltage from
phase C is monitored through a
resistor divider for back-EMF
sensing at this pin
A logic low input activates motor
braking by shutting off the high-
side output drivers and turning on
the low-side output drivers
A capacitor to GND sets the time
that the low-side output drivers
remain off after I
SENSE
exceeds its
threshold
An 137kW resistor to GND sets a
current proportional to V
REF
that is
used to set all the internal bias
currents except for the VCO
Signal and power ground
18(18)
UV FAULT
2(31)
3(32)
4(1)
5(3)
HA
HB
HC
19(19) C
RT
20(20) SPEED FB
SPEED COMP Speed control loop compensation is
set by a series resistor and capacitor
from SPEED COMP to GND
C
T
V
REF
SPEED SET
A capacitor from C
T
to GND sets
the PWM oscillator frequency
6.9V reference voltage output
Speed loop input which ranges
from 0 (stopped) to V
REF
(maximum speed)
Active high output driver for the
phase A low-side switch
Active high output driver for the
phase B low-side switch
Active high output driver for the
phase C low-side switch
24(24) FB C
This TTL level input selects the
direction of the motor by changing
the sequence of the commutation
state machine
This TTL level output corresponds
to the signal used to clock the
commutation state machine. The
output frequency is proportional to
the motor speed when the back-
EMF sensing loop is locked onto
the rotor position
12V power supply input
A capacitor to GND sets the
voltage-to-frequency ratio of the
VCO
An resistor to GND sets up a
current proportional to the input
voltage of the VCO
27(27) R
REF
23(23) FB B
21(21) C
RR
6(4)
7(5)
8(6)
22(22) FB A
9(7)
10(8)
11(9)
LA
LB
LC
12(10) F/R
25(25)
BRAKE
13(11) VCO/TACH
26(26) C
IOS
14(12) V
DD
15(15) C
VCO
16(16) R
VCO
28(28) GND
3
ML4426
ABSOLUTE MAXIMUM RATINGS
Absolute maximum ratings are those values beyond which
the device could be permanently damaged. Absolute
maximum ratings are stress ratings only and functional
device operation is not implied.
V
DD
.......................................................................... 14V
Logic Inputs (BRAKE, F/R) ...................... GND - 0.3 to 7V
All Other Inputs and Outputs .. GND -0.3V to V
DD
+ 0.3V
Output Current (LA, LB, LC,
HA, HB, HC)
............ ±50mA
Junction Temperature .............................................. 150ºC
Storage Temperature Range ...................... –65ºC to 150ºC
Lead Temperature (Soldering 10 sec.) ..................... 260ºC
Thermal Resistance (q
JA
)
28-Pin Narrow PDIP ......................................... 48ºC/W
28-Pin SOIC ..................................................... 75ºC/W
32-Pin TQFP ..................................................... 80ºC/W
OPERATING CONDITIONS
Temperature Range
ML4426CX................................................. 0ºC to 70ºC
ML4426IX ............................................... –40ºC to 85ºC
V
DD
......................................................... 10.8V to 13.2V
ELECTRICAL CHARACTERISTICS
Unless otherwise specified,V
DD
= 12V ± 10%, R
SENSE
= 1W, C
VCO
= 10nF, C
IOS
= 100pF, R
REF
= 137kW,
T
A
= Operating Temperature Range (Notes 1, 2)
SYMBOL
REFERENCE
V
REF
Total Variation
Line, Temp
6.5
6.9
7.5
V
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
PWM OSCILLATOR
Total Variation
Ramp Peak
Ramp Valley
Ramp Charging Current
C
T
= 1nF
28
3.9
1.7
?
kHz
V
V
µA
SPEED CONTROL LOOP
SPEED SET Input Voltage Range
SPEED FB Input Voltage Range
SPEED COMP Output Current
SPEED SET Error Amp Transconductance
V
SPEED SET
= xV, V
SPEED FB
= yV
0
0
±5
144
V
REF
V
REF
±20
V
V
µA
µ
START-UP
C
AT
Charging Current
C Suffix
I Suffix
C
AT
Threshold Voltage
C
RT
Charging Current
C Suffix
I Suffix
C
RT
Threshold Voltage
0.68
0.5
1.4
0.68
0.5
1.4
0.98
1.1
1.7
0.98
1.1
1.7
µA
µA
V
µA
µA
V
VOLTAGE CONTROLLED OSCILLATOR
Frequency Range
Frequency vs. SPEED FB
R
VCO
= 5V, SPEED FB = 6V
R
VCO
= 5V, 0.5V
£
SPEED FB
£
7V
1.5
1.85
300
2.2
kHz
Hz/V
CURRENT LIMIT
I
SENSE
Gain
One Shot OFF-Time
C
IOS
= 100pF
C Suffix
I Suffix
4.5
9
9
5.0
5.5
18
20
V/V
µs
µs
4
W
ML4426
ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
LOGIC INPUTS (
BRAKE
, F/
R
) (Note 3)
V
IH
V
IL
I
IH
I
IL
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
V
IH
= 2.4V
V
IL
= 0.4V
2.4
2.9
2
0.8
V
V
mA
mA
(Continued)
CONDITIONS
MIN
TYP
MAX
UNITS
LOGIC OUTPUTS (VCO/TACH,
UV FAULT
) (Note 3)
VCO/TACH Output High Voltage
VCO/TACH Output Low Voltage
UV FAULT Output High Voltage
I
OUT
= –100µA
I
OUT
= 400µA
I
OUT
= –10µA
C Suffix
I Suffix
UV FAULT
Output Low Voltage
I
OUT
= 400µA
3.4
3.2
4.5
2.2
0.6
5.4
5.6
0.6
V
V
V
V
V
BACK-EMF SAMPLER
SPEED FB Align Mode Voltage
SPEED FB Ramp Mode Current
C Suffix
I Suffix
SPEED FB Run Mode Current
State A, C
RT
= 5V,
V
PHB
= V
DD
/3
C Suffix
I Suffix
500
500
30
27
–15
–90
–90
125
250
720
750
90
90
15
–30
–27
mV
nA
nA
µA
µA
µA
µA
µA
State A, C
RT
= 5V, V
PHB
= V
DD
/2
State A, C
RT
= 5V,
V
PHB
= 2´V
DD
/3
C Suffix
I Suffix
OUTPUT DRIVERS
High Side Driver Output Low Current
High Side Driver Output High Voltage
Low Side Driver Output Low Voltage
Low Side Driver Output High Voltage
V
HX
= 2V
I
HX
= –10µA
I
LX
= 1mA
V(I
SENSE
) = 0V
C Suffix V
DD
– 2.2
I Suffix V
DD
– 2.9
Phase C Cross-conduction Lockout Threshold
V
DD
– 3.0
0.5
V
CC
– 1.3
0.2
0.7
1.2
mA
V
V
V
V
V
SUPPLY
I
DD
V
DD
Current
UVLO Threshold
C Suffix
I Suffix
UVLO Hysteresis
Note 1:
Limits are guaranteed by 100% testing, sampling, or correlation with worst case test conditions.
Note 2:
For explanation of states, see Figure 4 and Table 1.
Note 3:
The
BRAKE
and
UV FAULT
pins each have an internal 4kW resistor to the internal reference.
32
8.8
8.6
150
9.5
50
10.2
10.3
mA
V
V
mV
5
京公网安备 11010802033920号
EEWORLD
