74VHC123AFT,74VHC221AFT
CMOS Digital Integrated Circuits
Silicon Monolithic
74VHC123AFT,74VHC221AFT
1. Functional Description
• Dual Monostable Multivibrator
74VHC123AFT: Retriggerable
74VHC221AFT: Non-Retriggerable
2. General
The 74VHC123A/221AFT are high speed CMOS MONOSTABLE MULTIVIBRATOR fabricated with silicon
gate C
2
MOS technology.
There are two trigger inputs, A input (negative edge), and B input (positive edge). These inputs are valid for a
slow rise/fall time signal (t
r
= t
f
= 1 s) as they are schmitt trigger inputs. This device may also be triggered by
using CLR input (positive edge).
After triggering, the output stays in a MONOSTABLE state for a time period determined by the external resistor
and capacitor (R
X
, C
X
). A low level at the CLR input breaks this state.
Limits for C
X
and R
X
are:
External capacitor, C
X
: No limit
External resistor, R
X
: V
CC
= 2.0 V more than 5 kΩ
V
CC
≥
3.0 V more than 1 kΩ
An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply
voltage. This device can be used to interface 5 V to 3 V systems and two supply systems such as battery back up.
This circuit prevents device destruction due to mismatched supply and input voltages.
3. Features (Note)
(1)
(2)
(3)
(4)
AEC-Q100 (Rev. H) (Note 1)
Wide operating temperature range: T
opr
= -40 to 125
High speed: Propagation delay time = 8.1 ns (typ.) at V
CC
= 5 V
Low power dissipation:
Standby state: 4.0
µA
(max) at T
a
= 25
Active state: 750
µA
(max) at T
a
= 25
(5)
(6)
(7)
(8)
(9)
Note:
High noise immunity: V
NIH
= V
NIL
= 28 % V
CC
(min)
Power-down protection is provided on all inputs.
Balanced propagation delays: t
PLH
≈
t
PHL
Wide operating voltage range: V
CC(opr)
= 2.0 V to 5.5 V
Pin and function compatible with 74HC123,74HC221 type.
In the case of using only one circuit,CLR should be tied to GND, R
X
/C
X
C
X
QQ
should be tied to OPEN,
the other inputs should be tied to V
CC
or GND.
Note 1: This device is compliant with the reliability requirements of AEC-Q100. For details, contact your Toshiba sales
representative.
Start of commercial production
©2016 Toshiba Corporation
1
2013-05
2017-03-08
Rev.7.0
74VHC123AFT,74VHC221AFT
9. Block Diagram
(1)
(2)
C
X
, R
X
, D
X
are external
Capacitor, resistor, and diode, respectively.
External clamping diode, D
X
;
The external capacitor is charged to V
CC
level in the wait state, i.e. when no trigger is applied.
If the supply voltage is turned off, C
X
is discharges mainly through the internal (parasitic) diode. If C
X
is
sufficiently large and V
CC
drops rapidly, there will be some possibility of damaging the IC through in
rush current or latch-up. If the capacitance of the supply voltage filter is large enough and V
CC
drops
slowly, the in rush current is automatically limited and damage to the IC is avoided.
The maximum value of forward current through the parasitic diode is
±20
mA.
In the case of a large C
X
, the limit of fall time of the supply voltage is determined as follows:
t
f
≥
(V
CC
- 0.7) C
X
/20 mA
(t
f
is the time between the supply voltage turn off and the supply voltage reaching 0.4 V
CC
.)
In the even a system does not satisfy the above condition, an external clamping diode (D
X
) is needed to
protect the IC from rush current.
©2016 Toshiba Corporation
4
2017-03-08
Rev.7.0
MCU
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