LNBH24LQTR datasheet, PDF - EEWORLD Datasheet

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LNBH24LQTR: DescriptionPower Management Specialized - PMIC Dual LNBS Supply Control IC I2C INT; CategoryPower/power management The power supply circuit; File Size502KB，25 Pages; ManufacturerSTMicroelectronics; Websitehttp://www.st.com/

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LNBH24LQTR Overview

Power Management Specialized - PMIC Dual LNBS Supply Control IC I2C INT

LNBH24LQTR Parametric

Parameter Name	Attribute value
Brand Name	STMicroelectronics
Maker	STMicroelectronics
Parts packaging code	QFN
package instruction	HVQCCN, LCC32,.2SQ,20
Contacts	32
Reach Compliance Code	compliant
ECCN code	EAR99
Factory Lead Time	10 weeks
Adjustable threshold	NO
Analog Integrated Circuits - Other Types	POWER SUPPLY MANAGEMENT CIRCUIT
JESD-30 code	S-XQCC-N32
JESD-609 code	e3
length	5 mm
Humidity sensitivity level	1
Number of channels	1
Number of functions	1
Number of terminals	32
Package body material	UNSPECIFIED
encapsulated code	HVQCCN
Encapsulate equivalent code	LCC32,.2SQ,20
Package shape	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)	260
power supply	12 V
Certification status	Not Qualified
Maximum seat height	1 mm
Maximum supply current (Isup)	70 mA
Maximum supply voltage (Vsup)	15 V
Minimum supply voltage (Vsup)	8 V
Nominal supply voltage (Vsup)	12 V
surface mount	YES
Terminal surface	Matte Tin (Sn) - annealed
Terminal form	NO LEAD
Terminal pitch	0.5 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	5 mm
Base Number Matches	1

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LNBH24L

Dual LNBS supply and control IC with step-up and I²C interface

Features

■

Complete interface between LNBS and I²C bus

Built-in DC-DC converter for single 12 V supply

operation and high efficiency (typ. 93%@0.5 A)

Selectable output current limit by external

resistor

Compliant with main satellite receivers output

voltage specification

Auxiliary modulation input (EXTM) facilitates

DiSEqC™ 1.X encoding

Low-drop post regulator and high efficiency

step-up PWM with integrated power N-MOS

allow low power losses

Overload and over-temperature internal

protections with I²C diagnostic bits

Output voltage and output current level

diagnostic feedback by I²C bits

LNB short circuit dynamic protection

+/- 4 kV ESD tolerant on output power pins

QFN32 5 x 5 mm (ePad)

■

Description

Intended for analog and digital DUAL satellite

receivers/Sat-TV, Sat-PC cards, the LNBH24L is

a monolithic voltage regulator and interface IC,

assembled in QFN 5x5 ePAD, specifically

designed to provide the 13 / 18 V power supply

and the 22 kHz tone signaling for two independent

LNB down-converters in the antenna dishes

and/or multi-switch box. In this application field, it

offers a dual tuner STBs complete solution with

extremely low component count, low power

dissipation together with simple design and I²C

standard interfacing.

Table 1.

Device summary

Order code

LNBH24LQTR

Package

QFN32 5 x 5 (Exposed pad)

Packaging

Tape and reel

March 2010

Doc ID 16857 Rev 2

1/25

www.st.com

Contents

LNBH24L

Contents

Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2.1

2.2

2.3

2.4

2.5

2.6

2.7

2.8

2.9

2.10

2.11

Application information (valid for each section A/B) . . . . . . . . . . . . . . . . . . 5

DiSEqC™ data encoding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

DiSEqC™ 1.X implementation by EXTM pin . . . . . . . . . . . . . . . . . . . . . . . 5

DISEQC™ 1.X implementation with VoTX and EXTM pin connection . . . . 5

PDC optional circuit for DISEQC™ 1.X applications using

VoTX signal on to EXTM pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

I²C interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Output voltage selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Diagnostic and protection functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Over-current and short circuit protection and diagnostic . . . . . . . . . . . . . . 7

Thermal protection and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Output current limit selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Application circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

I²C bus interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

6.1

6.2

6.3

6.4

6.5

Data validity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Start and stop condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Byte format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Transmission without acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

LNBH24 software description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

7.1

7.2

7.3

Interface protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

System register (SR, 1 Byte for each section A and B) . . . . . . . . . . . . . . 15

Transmitted data (I²C bus write mode) for each sections A/B . . . . . . . . . 15

2/25

Doc ID 16857 Rev 2

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