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DS1258W
3.3V 128k x 16 Nonvolatile
SRAM
PIN ASSIGNMENT
CEU
CEL
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
GND
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
OE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
V
CC
WE
A16
A15
A14
A13
A12
A11
A10
A9
GND
A8
A7
A6
A5
A4
A3
A2
A1
A0
FEATURES
§
§
§
§
§
§
§
§
10-Year Minimum Data Retention in the
Absence of External Power
Data is Automatically Protected During a
Power Loss
Separate Upper Byte and Lower Byte Chip
Select Inputs
Unlimited Write Cycles
Low-Power CMOS
Read and Write Access Times as Fast as
100ns
Lithium Energy Source is Electrically
Disconnected to Retain Freshness Until
Power is Applied for the First Time
Optional Industrial Temperature Range of
-40°C to +85°C, Designated IND
40-Pin Encapsulated Package
740mil Extended
PIN DESCRIPTION
A0 - A16
DQ0 - DQ15
CEU
CEL
WE
OE
V
CC
GND
- Address Inputs
- Data In/Data Out
- Chip Enable Upper Byte
- Chip Enable Lower Byte
- Write Enable
- Output Enable
- Power (+3.3V)
- Ground
DESCRIPTION
The DS1258W 3.3V 128k x 16 Nonvolatile SRAM is a 2,097,152-bit, fully static, nonvolatile (NV)
SRAM, organized as 131,072 words by 16 bits. Each NV SRAM has a self-contained lithium energy
source and control circuitry, which constantly monitors V
CC
for an out-of-tolerance condition. When such
a condition occurs, the lithium energy source is automatically switched on and write protection is
unconditionally enabled to prevent data corruption. DIP-package DS1258W devices can be used in place
of solutions which build nonvolatile 128k x 16 memory by utilizing a variety of discrete components.
There is no limit on the number of write cycles that can be executed and no additional support circuitry is
required for microprocessor interfacing.
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052902
DS1258W
READ MODE
The DS1258W executes a read cycle whenever
WE
(Write Enable) is inactive (high) and either/both of
CEU
or
CEL
(Chip Enables) are active (low) and
OE
(Output Enable)is active (low). The unique address
specified by the 17 address inputs (A0-A16) defines which of the 131,072 words of data is accessed. The
status of
CEU
and
CEL
determines whether all or part of the addressed word is accessed. If
CEU
is active
with
CEL
inactive, then only the upper byte of the addressed word is accessed. If
CEU
is inactive with
CEL
active, then only the lower byte of the addressed word is accessed. If both the
CEU
and
CEL
inputs
are active (low), then the entire 16-bit word is accessed. Valid data will be available to the 16 data output
drivers within t
ACC
(Access Time) after the last address input signal is stable, providing that
CEU
,
CEL
and
OE
access times are also satisfied. If
CEU
,
CEL
, and
OE
access times are not satisfied, then data
access must be measured from the later-occurring signal, and the limiting parameter is either t
CO
for
CEU
,
CEL
, or t
OE
for
OE
rather than address access.
WRITE MODE
The DS1258W executes a write cycle whenever
WE
and either/both of
CEU
or
CEL
are active (low)
after address inputs are stable. The unique address specified by the 17 address inputs (A0-A16) defines
which of the 131,072 words of data is accessed. The status of
CEU
and
CEL
determines whether all or
part of the addressed word is accessed. If
CEU
is active with
CEL
inactive, then only the upper byte of
the addressed word is accessed. If
CEU
is inactive with
CEL
active, then only the lower byte of the
addressed word is accessed. If both the
CEU
and
CEL
inputs are active (low), then the entire 16-bit word
is accessed. The write cycle is terminated by the earlier rising edge of
CEU
and/or
CEL
, or
WE
. All
address inputs must be kept valid throughout the write cycle.
WE
must return to the high state for a
minimum recovery time (t
WR
) before another cycle can be initiated. The
OE
control signal should be kept
inactive (high) during write cycles to avoid bus contention. However, if the output drivers are enabled
(
CEU
and/or
CEL
, and
OE
active) then
WE
will disable the outputs in t
ODW
from its falling edge.
READ/WRITE FUNCTION
Table 1
OE
WE
CEL
CEU
V
CC
CURRENT
I
CCO
I
CCO
DQ0-DQ7
High-Z
Output
Output
High-Z
Input
DQ8-DQ15
High-Z
Output
High-Z
Output
Input
High-Z
Input
High-Z
CYCLE
PERFORMED
Output Disabled
Read Cycle
H
L
L
L
X
X
X
X
H
H
H
H
L
L
L
X
X
L
L
H
L
L
H
H
X
L
H
L
L
H
L
H
I
CCO
I
CCS
Input
High-Z
High-Z
Write Cycle
Output Disabled
DATA RETENTION MODE
The DS1258W provides full functional capability for V
CC
greater than 3.0V, and write-protects by 2.8V.
Data is maintained in the absence of V
CC
without any additional support circuitry. The nonvolatile static
RAMs constantly monitor V
CC
. Should the supply voltage decay, the NV SRAMs automatically write-
protect themselves, all inputs become “don’t care,” and all outputs become high impedance. As V
CC
falls
below approximately 2.5V, a power-switching circuit connects the lithium energy source to RAM to
retain data. During power-up, when V
CC
rises above approximately 2.5V, the power switching circuit
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DS1258W
ABSOLUTE MAXIMUM RATINGS*
Voltage on Any Pin Relative to Ground
Operating Temperature Range
Storage Temperature Range
Soldering Temperature
-0.3V to +4.6V
0°C to 70°C, -40°C to +85°C for Industrial Parts
-40°C to +70°C, -40°C to +85°C for Industrial Parts
See IPC/JEDEC J-STD-020A Specification
* This is a stress rating only and functional operation of the device at these or any other conditions above
those indicated in the operation sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods of time may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS
PARAMETER
Power Supply Voltage
Logic 1
Logic 0
SYMBOL
V
CC
V
IH
V
IL
MIN
3.0
2.2
0.0
TYP
3.3
MAX
3.6
V
CC
0.4
(t
A
: See Note 10)
UNITS
V
V
V
NOTES
DC ELECTRICAL CHARACTERISTICS
PARAMETER
Input Leakage Current
I/O Leakage Current
CE
³
V
IH
£
V
CC
Output Current @ 2.2V
Output Current @ 0.4V
Standby Current
CEU
,
CEL
=2.2V
Standby Current
CEU
,
CEL
=V
CC
-0.2V
Operating Current
Write Protection Voltage
SYMBOL
I
IL
I
IO
I
OH
I
OL
I
CCS1
I
CCS2
I
CCO1
V
TP
(t
A
: See Note 10) (V
CC
= 3.3V
±
0.3V)
MIN
-2.0
-1.0
-1.0
2.0
100
60
2.8
2.9
450
250
100
3.0
TYP
MAX
+2.0
+1.0
UNITS
mA
mA
mA
mA
mA
mA
mA
V
NOTES
CAPACITANCE
PARAMETER
Input Capacitance
Input/Output Capacitance
SYMBOL
C
IN
C
I/O
MIN
TYP
20
5
MAX
25
10
(t
A
= +25°C)
UNITS
pF
pF
NOTES
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Microcontroller MCU
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