PPC440EPX-SUA533TZ datasheet, PDF

Datasheet> All Categories > The embedded processor and controller> Microcontrollers and processors> PPC440EPX-SUA533TZ

PPC440EPX-SUA533TZ: DescriptionRISC Microprocessor, 32-Bit, 533MHz, CMOS, PBGA680, 35 MM, ROHS COMPLIANT, THERMALLY ENHANCED, PLASTIC, BGA-680; CategoryThe embedded processor and controller Microcontrollers and processors; File Size3MB，94 Pages; ManufacturerApplied Micro Circuits (MACOM); Environmental Compliance

Download Datasheet Parametric View All

PPC440EPX-SUA533TZ Overview

RISC Microprocessor, 32-Bit, 533MHz, CMOS, PBGA680, 35 MM, ROHS COMPLIANT, THERMALLY ENHANCED, PLASTIC, BGA-680

PPC440EPX-SUA533TZ Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Applied Micro Circuits (MACOM)
Parts packaging code	BGA
package instruction	BGA, BGA680,34X34,40
Contacts	680
Reach Compliance Code	compliant
ECCN code	3A001.A.3
Address bus width	32
bit size	32
boundary scan	YES
maximum clock frequency	66.66 MHz
External data bus width	64
Format	FLOATING POINT
Integrated cache	YES
JESD-30 code	S-PBGA-B680
length	35 mm
low power mode	YES
Number of terminals	680
Package body material	PLASTIC/EPOXY
encapsulated code	BGA
Encapsulate equivalent code	BGA680,34X34,40
Package shape	SQUARE
Package form	GRID ARRAY
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	1.5,1.8,2.5,3.3 V
Certification status	Not Qualified
Maximum seat height	2.65 mm
speed	533 MHz
Maximum slew rate	3350 mA
Maximum supply voltage	1.6 V
Minimum supply voltage	1.425 V
Nominal supply voltage	1.5 V
surface mount	YES
technology	CMOS
Terminal form	BALL
Terminal pitch	1 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED
width	35 mm
uPs/uCs/peripheral integrated circuit type	MICROPROCESSOR, RISC
Base Number Matches	1

Preview

Download Datasheet

View All

Part Number 440EPx

Revision 1.26 – October 15, 2007

440EPx

PowerPC 440EPx Embedded Processor

Features

• PowerPC

440 processor operating up to

667 MHz with 32 KB I-cache and D-cache with

parity checking.

• 16 KB of on-chip SRAM.

• Selectable processor:bus clock ratios of N:1, N:2.

• Floating Point Unit with single- and double-

precision and single-cycle throughput.

• Dual bridged Processor Local Buses (PLBs) with

64- and 128-bit widths.

• Double Data Rate 2/1 (DDR2/1) Synchronous

DRAM (SDRAM) interface operating up to

166 MHz (333 MHz data transfer rate) with

optional ECC.

• DMA support for external peripherals, internal

UART and memory.

• Programmable Interrupt Controller supports

interrupts from a variety of sources.

• Programmable General Purpose Timers (GPT).

• PCI V2.2 interface (3.3 V only). Thirty-two bits at

up to 66 MHz.

• Two Ethernet 10/100/1000 Mbps half- or full-

Preliminary Data Sheet

duplex interfaces. Operational modes supported

are with packet reject, Jumbo frames, and

interrupt coalescing.

• Up to four serial ports (16750 compatible UART).

• One USB 2.0 Device or Host interface with

internal PHY and one USB 2.0 direct Device UTMI

interface.

• External peripheral bus (32-bit data) for up to six

devices with external mastering.

• Two IIC interfaces (one with boot parameter read

capability).

• NAND Flash interface.

• SPI interface.

• General Purpose I/O (GPIO) interface.

• JTAG interface for board level testing.

• Boot from PCI memory, NOR Flash on the

external peripheral bus, or NAND Flash on the

NAND Flash interface.

• Optional security feature (PPC440EPx-S).

• Available in RoHS compliant, lead-free package.

Description

Designed specifically to address high-end embedded

applications, the PowerPC 440EPx (PPC440EPx)

provides a high-performance, low-power solution that

interfaces to a wide range of peripherals and

incorporates on-chip power management features.

This chip contains a high-performance RISC

processor, on-chip SRAM, a floating point unit,

DDR2/1 SDRAM controller, PCI bus interface, control

for external ROM and peripherals, DMA with

scatter/gather support, Ethernet ports, serial ports, IIC

interfaces, SPI interface, USB ports, NAND Flash

interface, an optional security feature

(PPC440EPx-S), and general purpose I/O.

Technology: CMOS Cu-11, 0.13

μm.

Package: 35 mm, 680-ball thermally enhanced plastic

ball grid array (TE-EPBGA). RoHS compliant package

available.

Typical power: Less than 3 W at 533 MHz.

Supply voltages required: 3.3 V, 2.5 V, 1.8 V (DDR2) or

2.5 V (DDR1), 1.5 V.

AMCC Proprietary

440EPx – PPC440EPx Embedded Processor

Revision 1.26 – October 15, 2007

Preliminary Data Sheet

Contents

Ordering and PVR Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Address Maps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

PowerPC 440 Processor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Floating Point Unit (FPU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

SRAM Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Internal Buses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Security Function (optional) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

KASUMI Algorithm (optional) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

PCI Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

DDR2/1 SDRAM Memory Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

External Peripheral Bus Controller (EBC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Ethernet Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

DMA-to-PLB3 (64-bit) Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

DMA-to-PLB4 (128-bit) Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Serial Ports (UART) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

IIC Bus Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Serial Peripheral Controller (SPI/SCP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Universal Serial Bus 2.0 (USB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

NAND Flash Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

General Purpose Timers (GPT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

General Purpose IO (GPIO) Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Universal Interrupt Controller (UIC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

JTAG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Package Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Signal Lists . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Signal Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

Device Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

Spread Spectrum Clocking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75

I/O Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

DDR2/1 SDRAM I/O Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85

DDR SDRAM Write Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87

DDR SDRAM Read Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89

Strapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91

Serial EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91

AMCC Proprietary

Revision 1.26 – October 15, 2007

440EPx – PPC440EPx Embedded Processor

Preliminary Data Sheet

Figures

Figure 1. Order Part Number Key . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 2. PPC440EPx Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 3. 35 mm, 680-Ball TE-PBGA Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 4. Overshoot Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68

Figure 5. Timing Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74

Figure 6. Input Setup and Hold Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79

Figure 7. Output Delay and Float Timing Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79

Figure 8. Output Delay and Float Timing Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79

Figure 9. Output Delay and Float Timing Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79

Figure 10. DDR SDRAM Simulation Signal Termination Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86

Figure 11. DDR SDRAM Write Cycle Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88

Figure 12. DDR SDRAM DQS Read Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90

Tables

Table 1. System Memory Address Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Table 2. DCR Address Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 3 Recommended Reflow Soldering Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Table 4. JEDEC Moisture Sensitivity Level and Ball Composition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Table 5. Signals Listed Alphabetically . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Table 6. Signals Listed by Ball Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

Table 7. Pin Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

Table 8. Signal Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

Table 9. Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

Table 10. Recommended DC Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

Table 11. Input Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68

Table 12. Overshoot and Undershoot . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69

Table 13. Typical DC Power Supply Requirements Using DDR2 Memory . . . . . . . . . . . . . . . . . . . . . . . . . 70

Table 14. Typical DC Power Supply Requirements Using DDR1 Memory . . . . . . . . . . . . . . . . . . . . . . . . . 70

Table 15. V

Supply Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70

Table 16. DC Power Supply Loads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71

Table 17. Package Thermal Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72

Table 18. Clocking Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73

Table 19. Peripheral Interface Clock Timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

Table 20. I/O Specifications—All Speeds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81

Table 21. I/O Specifications—400 MHz to 667 MHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84

Table 22. DDR SDRAM Output Driver Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87

Table 23. DDR SDRAM Write Operation Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87

Table 24. I/O Timing—DDR SDRAM T

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88

Table 25. I/O Timing—DDR SDRAM T

, T

, and T

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89

Table 26. I/O Timing—DDR SDRAM T

and T

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89

AMCC Proprietary

Recommended Resources

Digital tube extinguishing signal circuit diagram

AD7660 negative voltage and positive voltage doubler output circuit diagram

Oscillator circuit diagram using FETs and transistors

4-bit serial division operation circuit

Handmade MP3 player circuit and information

820e computer motherboard circuit diagram_43

Bluetooth driver problem under WINCE5.0: The Bluetooth module used is a UART interface, and the generated system is required to include a Bluetooth driver. The Bluetooth device can be managed using the BLUETOOTH device properties in the cont...; bailicai Embedded System

Problems with synchronous operation of two or more DC brushed motors with dual Hall: Now there are two or more motors, each with a screw that extends and retracts, but each time it extends or retracts, it stops randomly, and everyone's position is the same. The motors are equipped wit...; hehongqing Motor Drive Control（Motor Control）

Seeking partners for new energy vehicle instrument development, outsourcing, technology: I was born in a Fortune 500 company, and I am good at market management and sales. With industry consulting and keen vision, I think the new energy vehicle industry has a good future and automotive in...; 大头阿呆 Recruitment

Has anyone played with cc430F5137? ??? ??? ??? ???: May I ask your question? I use the cc430F5137 module to test the program AP_as_Data_Hub. Why can't the AP and ED connect? I initially think that the ED did not send a connection request to the AP. My ...; xuebaoxing Microcontroller MCU

I opened the CameraDshowApp.exe that comes with 6410 WINCE6.0 to test the camera, and found that my 3.5-inch screen is too small, causing some options to not be displayed.: I opened the CameraDshowApp.exe that comes with 6410 WINCE6.0 to test the camera, and found that my 3.5-inch screen is too small, so some options cannot be displayed: Oh~~~ It's so blurry~~ 1. In whic...; SUMIDAsz Embedded System

Embedded: I really want to know what the future of embedded system major will be like in 4 years! I am a freshman now!...; zqiaoshi Embedded System

Shortcut: E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF EG EH EI EJ EK EL EM EN EO EP EQ ER ES ET EU EV EW EX EY EZ F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF FG FH FI FJ FK FL FM FN FO FP FQ FR FS FT FU FV FW FX FY FZ G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 GA GB GC GD GE GF GG GH GI GJ GK GL GM GN GO GP GQ GR GS GT GU GV GW GX GZ H0 H1 H2 H3 H4 H5 H6 H7 H8 HA HB HC HD HE HF HG HH HI HJ HK HL HM HN HO HP HQ HR HS HT HU HV HW HX HY HZ I1 I2 I3 I4 I5 I6 I7 IA IB IC ID IE IF IG IH II IK IL IM IN IO IP IQ IR IS IT IU IV IW IX J0 J1 J2 J6 J7 JA JB JC JD JE JF JG JH JJ JK JL JM JN JP JQ JR JS JT JV JW JX JZ K0 K1 K2 K3 K4 K5 K6 K7 K8 K9 KA KB KC KD KE KF KG KH KI KJ KK KL KM KN KO KP KQ KR KS KT KU KV KW KX KY KZ

Popular Components