8-Bit, 250 MSPS
3.3 V A/D Converter
AD9480
FEATURES
DNL =
±
0.25 LSB
INL =
±
0.5 LSB
Single 3.3 V supply operation (3.0 to 3.6 V)
Power dissipation of 590 mW at 250 MSPS
1 V p-p analog input range
Internal 1.0 V reference
Single-ended or differential analog inputs
LVDS outputs (ANSI 644 levels)
Power-down mode
Clock duty cycle stabilizer
FUNCTIONAL BLOCK DIAGRAM
VREF SENSE
AGND
DrGND
DRVDD
AVDD
REFERENCE
AD9480
VIN+
VIN–
T&H
8-BIT
ADC
PIPELINE
CORE
8
LVDS
16
D7–D0
(LVDS)
CLK+
CLK–
CLOCK
MGMT
DCO+
DCO-
LOGIC
(LVDS)
04619-0-001
APPLICATIONS
Digital oscilloscopes
Instrumentation and measurement
Communications:
Point-to-point radios
Predistortion loops
PDWN
S1
LVDSBIAS
Figure 1.
GENERAL DESCRIPTION
The AD9480 is an 8-bit, monolithic analog-to-digital converter
optimized for high speed and low power consumption. Small in
size and easy to use, the product operates at a 250 MSPS
conversion rate, with excellent linearity and dynamic
performance over its full operating range.
To minimize system cost and power dissipation, the AD9480
includes an internal reference and track-and-hold circuit. The
user only provides a 3.3 V power supply and a differential
encode clock. No external reference or driver components are
required for many applications.
The digital outputs are LVDS (ANSI 644) compatible with an
option of twos complement or binary output format. The output
data bits are provided in parallel fashion along with an LVDS
output clock, which simplifies data capture.
Fabricated on an advanced BiCMOS process, the AD9480 is
available in a 44-lead surface-mount package (TQFP) specified
over the industrial temperature range (−40°C to +85°C).
PRODUCT HIGHLIGHTS
1.
Superior linearity.
A DNL of ±0.25 makes the AD9480 suitable for
instrumentation and measurement applications.
Power-down mode.
A power-down function may be exercised to bring total
consumption down to 15 mW.
LVDS outputs (ANSI-644).
LVDS outputs simplify timing and improve noise
performance.
2.
3.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703
© 2004 Analog Devices, Inc. All rights reserved.
AD9480
TABLE OF CONTENTS
DC Specifications ............................................................................. 3
Digital Specifications........................................................................ 4
AC Specifications.............................................................................. 5
Switching Specifications .................................................................. 6
Timing Diagram ........................................................................... 6
Absolute Maximum Ratings............................................................ 7
Explanation of Test Levels........................................................... 7
ESD Caution.................................................................................. 7
Pin Configuration and Function Descriptions............................. 8
Definitions ......................................................................................... 9
Equivalent Circuits ......................................................................... 11
Application Notes ........................................................................... 12
Clocking the AD9480................................................................. 12
Analog Inputs.............................................................................. 12
Voltage Reference ....................................................................... 13
Digital Outputs ........................................................................... 14
Output Coding............................................................................ 14
Interleaving Two AD9480s........................................................ 14
Data Clock Out........................................................................... 14
Typical Performance Characteristics ........................................... 15
AD9480 Evaluation Board ............................................................ 19
Power Connector........................................................................ 19
Analog Inputs.............................................................................. 19
Gain.............................................................................................. 19
Optional Operational Amplifier............................................... 19
Clock ............................................................................................ 19
Optional Clock Buffer ............................................................... 19
Optional XTAL ........................................................................... 19
Voltage Reference ....................................................................... 20
Data Outputs............................................................................... 20
Evaluation Board Bill of Materials ............................................... 21
PCB Schematics .............................................................................. 22
PCB Layers ...................................................................................... 24
Outline Dimensions ....................................................................... 26
Ordering Guide .......................................................................... 27
REVISION HISTORY
7/04—Revision 0: Initial Version
Rev. 0 | Page 2 of 28
AD9480
DC SPECIFICATIONS
AVDD = 3.3 V, DRVDD = 3.3 V; T
MIN
= –40°C, T
MAX
= +85°C, A
IN
= –1 dBFS, full scale = 1.0 V, internal reference, differential analog and
clock inputs, unless otherwise noted.
Table 1.
Parameter
RESOLUTION
ACCURACY
No Missing Codes
Offset Error
Gain Error
1
Differential Nonlinearity (DNL)
AD9480BSUZ-250
AD9480ASUZ-250
Integral Nonlinearity (INL)
TEMPERATURE DRIFT
Offset Error
Gain Error
Reference
REFERENCE
Internal Reference Voltage
Output Current
2
I
VREF
Input Current
3
I
SENSE
Input Current
2
ANALOG INPUTS (VIN+, VIN−)
Differential Input Voltage Range (FS = 1)
4
Common-Mode Voltage
Input Resistance
Input Capacitance
Analog Bandwidth, Full Power
POWER SUPPLY
AVDD
DRVDD
Power Dissipation
5
Power-Down Dissipation
IAVDD
5
IDRVDD
5
Power Supply Rejection Ratio (PSRR)
Temp
Test Level
Min
AD9480-250
Typ
8
Guaranteed
−40
−6.0
−0.5
−0.85
−0.9
±0.28
±
0.35
±
0.26
30
0.03
±.025
0.97
1.0
1.03
1.5
100
10
40
6.0
0.5
0.85
0.9
mV
% FS
LSB
LSB
LSB
uV/°C
%FS/°C
mV/°C
V
mA
uA
uA
Vpp
V
kΩ
kΩ
pF
MHz
V
V
mW
mW
mA
mA
mV/V
Max
Unit
Bits
Full
25°C
25°C
Full
Full
Full
Full
Full
Full
Full
25°C
25°C
25°C
Full
Full
25°C
Full
25°C
25°C
Full
Full
25°C
25°C
Full
Full
25°C
VI
I
I
VI
VI
VI
V
V
V
VI
IV
I
I
V
VI
I
VI
V
V
IV
IV
V
V
VI
VI
V
1.7
8.6
8.4
1
1.9
10
10
4
750
3.3
3.3
590
15
145
34
−4.2
2.1
10.7
11.2
3.0
3.0
3.6
3.6
156
38
1
2
Gain error and gain temperature coefficients are based on the ADC only (with a fixed 1 V external reference and a 1 V p-p differential analog input).
Internal reference mode; SENSE = AGND.
3
External reference mode; VREF driven by external 1.0 V reference; SENSE = AVDD.
4
In FS = 1 V, both analog inputs are 500 mV p-p and out of phase with each other.
5
Power dissipation and current measured with rated encode and a dc analog input (outputs static). See Figure 29 for active operation.
Rev. 0 | Page 3 of 28
AD9480
DIGITAL SPECIFICATIONS
AVDD = 3.3 V, DRVDD = 3.3 V; T
MIN
= –40°C, T
MAX
= +85°C, A
IN
= –1 dBFS, full scale = 1.0 V, internal reference, differential analog and
clock inputs, unless otherwise noted.
Table 2.
Parameter
CLOCK INPUTS (CLK+, CLK−)
Differential Input
Common-Mode Voltage
1
Input Resistance
Input Capacitance
LOGIC INPUTS (PDWN, S1)
Logic 1 Voltage
Logic 0 Voltage
Logic 1 Input Current
Logic 0 input Current
Input Resistance
Input Capacitance
DIGITAL OUTPUTS
Differential Output Voltage (V
OD
)
2
Output Offset Voltage (V
OS
)
Output Coding
Temp
Full
Full
Full
25°C
Full
Full
Full
Full
25°C
25°C
Full
Full
Full
Test Level
IV
VI
VI
V
IV
IV
VI
VI
V
V
VI
VI
IV
Min
200
1.4
4.2
AD9480-250
Typ
Max
Unit
mVpp
V
kΩ
pF
V
V
uA
uA
kΩ
pF
mV
V
1.5
5.5
4
1.68
6.0
2.0
0.8
±160
10
30
4
247
1.125
454
1.375
Twos complement or binary
1
2
The common mode for CLOCK inputs can be externally set, such that 0.9 V < CLK ± < 2.6 V.
LVDSBIAS resistor = 3.74 kΩ.
Rev. 0 | Page 4 of 28
AD9480
AC SPECIFICATIONS
AVDD = 3.3 V, DRVDD = 3.3 V; T
MIN
= –40°C, T
MAX
= +85°C, A
IN
= –1 dBFS, full scale = 1.0 V, internal reference, differential analog and
clock inputs, unless otherwise noted.
Table 3.
Parameter
SIGNAL TO NOISE RATIO (SNR)
f
IN
= 19.7 MHz
f
IN
= 70.1 MHz
f
IN
= 170 MHz
SIGNAL TO NOISE AND DISTORTION (SINAD)
f
IN
= 19.7 MHz
f
IN
= 70.1 MHz
f
IN
= 170 MHz
EFFECTIVE NUMBER OF BITS (ENOB)
f
IN
= 19.7 MHz
f
IN
= 70.1 MHz
f
IN
= 170 MHz
WORST SECOND OR THIRD HARMONIC DISTORTION
f
IN
= 19.7 MHz
f
IN
= 70.1 MHz
f
IN
= 170 MHz
WORST OTHER
f
IN
= 19.7 MHz
f
IN
= 70.1 MHz
f
IN
= 170 MHz
SPURIOUS-FREE DYNAMIC RANGE (SFDR)
1
f
IN
= 19.7 MHz
f
IN
= 70.1 MHz
f
IN
= 170 MHz
TWO-TONE INTERMODULATION DISTORTION (IMD)
f
IN1
= 69.3 MHz, f
IN 2
= 70.3 MHz
Temp
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
Test Level
V
I
I
V
I
I
V
I
I
V
I
I
V
I
I
V
I
I
V
Min
AD9480-250
Typ
47
47
46
46.5
46.5
46.5
7.5
7.5
7.5
−65
−65
−65
−70
−70
−70
−65
−65
−65
−68
Max
Unit
dB
dB
dB
dB
dB
dB
Bits
Bits
Bits
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
45
45
44.8
44.8
7.2
7.2
−60
−60
−63
−63
−60
−60
1
Nyquist bin energy ignored.
Rev. 0 | Page 5 of 28
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