GE28F640W18BD60 datasheet, PDF

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GE28F640W18BD60: DescriptionIntel㈢ Wireless Flash Memory; Categorystorage storage; File Size1MB，100 Pages; ManufacturerIntel; Websitehttp://www.intel.com/

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GE28F640W18BD60 Overview

Intel㈢ Wireless Flash Memory

GE28F640W18BD60 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Intel
Parts packaging code	BGA
package instruction	VFBGA, BGA56,7X8,30
Contacts	56
Reach Compliance Code	compli
ECCN code	3A991.B.1.A
Maximum access time	60 ns
Other features	SYNCHRONOUS BURST MODE OPERATION ALSO POSSIBLE
startup block	BOTTOM
command user interface	YES
Universal Flash Interface	YES
Data polling	NO
JESD-30 code	R-PBGA-B56
JESD-609 code	e0
length	9 mm
memory density	67108864 bi
Memory IC Type	FLASH
memory width	16
Number of functions	1
Number of departments/size	8,127
Number of terminals	56
word count	4194304 words
character code	4000000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	4MX16
Package body material	PLASTIC/EPOXY
encapsulated code	VFBGA
Encapsulate equivalent code	BGA56,7X8,30
Package shape	RECTANGULAR
Package form	GRID ARRAY, VERY THIN PROFILE, FINE PITCH
page size	4 words
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	240
power supply	1.5/1.8,1.8 V
Programming voltage	1.8 V
Certification status	Not Qualified
Maximum seat height	1 mm
Department size	4K,32K
Maximum standby current	0.000005 A
Maximum slew rate	0.04 mA
Maximum supply voltage (Vsup)	1.95 V
Minimum supply voltage (Vsup)	1.7 V
Nominal supply voltage (Vsup)	1.8 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	TIN LEAD
Terminal form	BALL
Terminal pitch	0.75 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	30
switch bit	NO
type	NOR TYPE
width	7.7 mm

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Intel

Wireless Flash Memory (W18)

28F320W18, 28F640W18, 28F128W18

Datasheet

Product Features

■

High Performance Read-While-Write/

Erase

— Burst frequency at 66 MHz

— 60 ns Initial Access Read Speed

— 11 ns Burst-Mode Read Speed

— 20 ns Page-Mode Read Speed

— 4-, 8-, 16-, and Continuous-Word Burst

Mode Reads

— Burst and Page Mode Reads in all

Blocks, across all partition boundaries

— Burst Suspend Feature

— Enhanced Factory Programming at

3.1 µs/word (typ.for 0.13 µm)

Security

— 128-bit Protection Register

— 64-bits Unique Programmed by Intel

— 64-bits User-Programmable

— Absolute Write Protection with V

Ground

— Individual and Instantaneous Block

Locking/Unlocking with Lock-Down

Capability

Quality and Reliability

— Temperature Range: –40 °C to +85 °C

— 100k Erase Cycles per Block

— 0.13 µm ETOX™ VIII Process

— 0.18 µm ETOX™ VII Process

■

Architecture

— Multiple 4-Mbit Partitions

— Dual Operation: RWW or RWE

— 8KB parameter blocks

— 64KB main blocks

— Top or Bottom Parameter Devices

— 16-bit wide data bus

Software

— 5 µs (typ.) Program and Erase Suspend

Latency Time

— Flash Data Integrator (FDI) and Common

Flash Interface (CFI) Compatible

— Programmable WAIT Signal Polarity

Packaging and Power

— 0.13 µm: 32-, 64-, and 128-Mbit in VF

BGA Package; 128-Mbit in QUAD+

Package

— 0.18 µm: 32- and 128-Mbit Densities in

VF BGA Package; 64-Mbit Density in

µBGA* Package

— 56 Active Ball Matrix, 0.75 mm Ball-

Pitch

— V

= 1.70 V to 1.95 V

— V

CCQ

= 1.70 V to 2.24 V or 1.35 V to

1.80 V

— Standby current (0.13 µm): 8µA (typ.)

— Read current: 7mA (typ.)

The Intel

Wireless Flash Memory (W18) device with flexible multi-partition dual operation,

provides high-performance asynchronous and synchronous burst reads. It is an ideal memory for

low-voltage burst CPUs. Combining high read performance with flash memory’s intrinsic non-

volatility, the W18 device eliminates the traditional system-performance paradigm of shadowing

redundant code memory from slow nonvolatile storage to faster execution memory. It reduces

the total memory requirement that increases reliability and reduces overall system power

consumption and cost.

The W18 device’s flexible multi-partition architecture allows programming or erasing to occur

in one partition while reading from another partition. This allows for higher data write

throughput compared to single partition architectures. The dual-operation architecture also

allows two processors to interleave code operations while program and erase operations take

place in the background. The designer can also choose the size of the code and data partitions via

the flexible multi-partition architecture.

Notice:

This document contains information on new products in production. The specifications

are subject to change without notice. Verify with your local Intel sales office that you have the

latest datasheet before finalizing a design.

290701-009

December 2003

Contents

1.0 Introduction

...............................................................................................................................9

1.1

1.2

1.3

2.1

2.2

2.3

2.4

3.1

Document Purpose ...............................................................................................................9

Nomenclature .......................................................................................................................9

Conventions..........................................................................................................................9

Product Overview ...............................................................................................................10

Package Diagram ...............................................................................................................12

Signal Descriptions .............................................................................................................14

Memory Map and Partitioning .............................................................................................15

Bus Operations ...................................................................................................................18

3.1.1 Read ......................................................................................................................18

3.1.2 Burst Suspend .......................................................................................................19

3.1.3 Standby..................................................................................................................19

3.1.4 Reset .....................................................................................................................19

3.1.5 Write ......................................................................................................................20

Device Commands .............................................................................................................20

Command Sequencing .......................................................................................................24

Read Array..........................................................................................................................25

Read Device ID...................................................................................................................25

Read Query (CFI) ...............................................................................................................26

Read Status Register..........................................................................................................26

Clear Status Register..........................................................................................................28

Word Program ....................................................................................................................28

Factory Programming .........................................................................................................29

Enhanced Factory Program (EFP) .....................................................................................30

5.3.1 EFP Requirements and Considerations.................................................................30

5.3.2 Setup .....................................................................................................................31

5.3.3 Program .................................................................................................................31

5.3.4 Verify......................................................................................................................31

5.3.5 Exit.........................................................................................................................32

Program/Erase Suspend and Resume ...............................................................................34

Block Erase.........................................................................................................................36

Read-While-Write and Read-While-Erase ..........................................................................38

Block Lock Operations ........................................................................................................39

7.1.1 Lock .......................................................................................................................40

7.1.2 Unlock ....................................................................................................................40

2.0 Device Description

................................................................................................................10

3.0 Device Operations

.................................................................................................................18

3.2

3.3

4.1

4.2

4.3

4.4

4.5

5.1

5.2

5.3

4.0 Read Operations

....................................................................................................................25

5.0 Program Operations

.............................................................................................................28

6.0 Program and Erase Operations

.......................................................................................34

6.1

6.2

6.3

7.1

7.0 Security Modes

.......................................................................................................................39

Datasheet

Contents

7.2

7.3

7.1.3 Lock-Down............................................................................................................. 40

7.1.4 Block Lock Status .................................................................................................. 41

7.1.5 Lock During Erase Suspend .................................................................................. 41

7.1.6 Status Register Error Checking ............................................................................. 41

7.1.7 WP# Lock-Down Control ....................................................................................... 42

Protection Register ............................................................................................................. 42

7.2.1 Reading the Protection Register............................................................................ 43

7.2.2 Programing the Protection Register....................................................................... 43

7.2.3 Locking the Protection Register............................................................................. 44

VPP Protection ................................................................................................................... 45

8.0 Set Configuration Register

................................................................................................ 46

8.1

8.2

8.3

8.4

8.5

8.6

8.7

8.8

8.9

8.10

9.1

9.2

9.3

9.4

Read Mode (CR[15])........................................................................................................... 48

First Access Latency Count (CR[13:11]) ............................................................................ 48

8.2.1 Latency Count Settings.......................................................................................... 49

WAIT Signal Polarity (CR[10]) ............................................................................................ 50

WAIT Signal Function ......................................................................................................... 50

Data Hold (CR[9]) ............................................................................................................... 51

WAIT Delay (CR[8]) ............................................................................................................ 52

Burst Sequence (CR[7])...................................................................................................... 52

Clock Edge (CR[6])............................................................................................................. 54

Burst Wrap (CR[3]) ............................................................................................................. 54

Burst Length (CR[2:0])........................................................................................................ 54

Active Power....................................................................................................................... 55

Automatic Power Savings (APS) ........................................................................................ 55

Standby Power ................................................................................................................... 55

Power-Up/Down Characteristics......................................................................................... 55

9.4.1 System Reset and RST# ....................................................................................... 56

9.4.2 VCC, VPP, and RST# Transitions ......................................................................... 56

Power Supply Decoupling................................................................................................... 56

Absolute Maximum Ratings ................................................................................................ 57

Operating Conditions .......................................................................................................... 57

DC Current Characteristics (.13

∝µ

and .18 µµ)................................................................. 58

DC Voltage Characteristics................................................................................................. 60

Read Operations – .13

µµ Λιτηογραπηψ............................................................................

Read Operations – .18

µµ Λιτηογραπηψ............................................................................

AC Write Characteristics..................................................................................................... 74

Erase and Program Times.................................................................................................. 79

Reset Specifications ........................................................................................................... 80

AC I/O Test Conditions ....................................................................................................... 81

Device Capacitance............................................................................................................ 82

9.0 Power Consumption

............................................................................................................. 55

9.5

10.1

10.2

10.3

10.4

11.1

11.2

11.3

11.4

11.5

11.6

11.7

10.0 Thermal and DC Characteristics

..................................................................................... 57

11.0 AC Characteristics

................................................................................................................ 62

Appendix A Write State Machine States

............................................................................... 83

Appendix B Common Flash Interface

.................................................................................... 86

Datasheet

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