I made a Manchester decoding module (written in Verilog) at the receiving end of the optical fiber, without any verification algorithm. The bit error rate is very high, basically around 1%. If anyone ...
[font=宋体][size=3]1. Growth - From a rock youth to a design eliteOne day in September, at a technical seminar, Mr. A was looking through the demo board and asking about some technical details, just lik...
I am new to using Renesas chips. There are so many softwares to install when developing simulations. And there is a problem. There is little information online. Has anyone encountered the same problem...
[i=s]This post was last edited by 2638823746 on 2014-6-11 11:19[/i] I have a Zedboad development board, basically brand new, with the packaging, all accessories, and CD, basically brand new. If you ne...
[i=s] This post was last edited by dunqiyu123 on 2017-10-16 09:42 [/i] The pin spacing under the TO-92 package is only about 0.8, but the working voltage is 400+V. Both the electrical spacing and cree...