This is the output pin for the DDR memory termination voltage and it has a sink/source current capability of ±1.0A. VTT
voltage tracks the voltage at VDDQ pin divided in half. The output is turned OFF when EN pin is “Low” or when either the
VCC UVLO or the thermal shutdown protection function is activated.
Always connect a capacitor to VTT pin for loop gain and phase compensation and for reduction in output voltage variation
in the event of sudden load change. Be careful in choosing the capacitor as insufficient capacitance may cause oscillation
and high ESR (Equivalent Series Resistance) may result in increased output voltage variation during a sudden change in
load. Using a low-ESR ceramic capacitor, however, may reduce the loop gain and phase margin and may cause
oscillation. But this effect can be lessened by connecting a resistor in series with the capacitor. A 220μF functional
polymer capacitor (OS-CON, POS-CAP, NEO-CAP) is recommended, though ambient temperature and other conditions
should also be considered.
7. EN
A “High” input of 2.3V or higher to EN turns ON the VTT output. A “Low” input of 0.8V or less, on the other hand, turns
VTT to a Hi-Z state. With a “Low” EN input, however, the VREF output remains ON, provided that sufficient VCC and
VDDQ voltages have been established.
Absolute Maximum Ratings
Parameter
Input Voltage
Enable Input Voltage
Termination Input Voltage
VDDQ Reference Voltage
Output Current
Power Dissipation 1
Power Dissipation 2
Power Dissipation 3
Power Dissipation 4
Power Dissipation 5
Operating Temperature Range
Storage Temperature Range
Maximum Junction Temperature
Symbol
V
CC
V
EN
V
TT_IN
V
DDQ
I
TT
Pd1
Pd2
Pd3
Pd4
Pd5
Topr
Tstg
Tjmax
3
0.56
(Note 2)
0.69
(Note 3)
-
-
-
0.43
(Note 4)
-
-
-
-
-20 to +100
-55 to +150
+150
0.63
1.35
1.75
BD3533F
BD3533FVM
7
(Note 1)
7
(Note 1)
7
(Note 1)
7
(Note 1)
1
-
-
(Note 5)
(Note 6)
(Note 7)
BD3533HFN
Unit
V
V
V
V
A
W
W
W
W
W
°C
°C
°C
(Note 1) Should not exceed Pd. Instantaneous surge voltage, back electromotive force and voltage under less than 10% duty cycle.
(Note 2) Reduce by 4.48mW/°C for Ta over 25°C (With no heat sink).
(Note 3) Reduce by 5.52mW/°C for Ta over 25°C (When mounted on a board 70mmx70mmx1.6mm Glass-epoxy PCB).
(Note 4) Reduce by 3.5mW/°C for Ta over 25°C (With no heat sink).
(Note 5) Reduce by 5.04mW/°C for Ta over 25°C (when mounted on a 70mmx70mmx1.6mm glass-epoxy board, 1-layer, copper foil area : less than 0.2%)
(Note 6) Reduce by 10.8mW/°C for Ta over 25°C (when mounted on a 70mmx70mmx1.6mm glass-epoxy board, 1-layer, copper foil area : less than 7.0%)
(Note 7) Reduce by 14.0mW/°C for Ta over 25°C (when mounted on a 70mmx70mmx1.6mm glass-epoxy board, 1-layer,copper foil area : less than 65.0%)
Caution:
Operating the IC over the absolute maximum ratings may damage the IC. In addition, it is impossible to predict all destructive situations such as
short-circuit modes, open circuit modes, etc. Therefore, it is important to consider circuit protection measures, like adding a fuse, in case the IC is operated in a
special mode exceeding the absolute maximum ratings.
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