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APT5010B2FLLG

Description
Discrete Semiconductor Modules Power FREDFET - MOS7
CategoryDiscrete semiconductor    The transistor   
File Size305KB,5 Pages
ManufacturerMicrosemi
Websitehttps://www.microsemi.com
Environmental Compliance
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APT5010B2FLLG Overview

Discrete Semiconductor Modules Power FREDFET - MOS7

APT5010B2FLLG Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerMicrosemi
package instructionIN-LINE, R-PSIP-T3
Contacts3
Reach Compliance Codecompliant
ECCN codeEAR99
Avalanche Energy Efficiency Rating (Eas)1600 mJ
Shell connectionDRAIN
ConfigurationSINGLE WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage500 V
Maximum drain current (ID)46 A
Maximum drain-source on-resistance0.1 Ω
FET technologyMETAL-OXIDE SEMICONDUCTOR
JESD-30 codeR-PSIP-T3
JESD-609 codee1
Number of components1
Number of terminals3
Operating modeENHANCEMENT MODE
Maximum operating temperature150 °C
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formIN-LINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Polarity/channel typeN-CHANNEL
Maximum pulsed drain current (IDM)184 A
Certification statusNot Qualified
surface mountNO
Terminal surfaceTIN SILVER COPPER
Terminal formTHROUGH-HOLE
Terminal locationSINGLE
Maximum time at peak reflow temperatureNOT SPECIFIED
transistor applicationsSWITCHING
Transistor component materialsSILICON
Base Number Matches1
APT5010B2FLL
APT5010LFLL
500V 46A 0.100
B2FLL
POWER MOS 7
®
R
FREDFET
Power MOS 7 is a new generation of low loss, high voltage, N-Channel
enhancement mode power MOSFETS. Both conduction and switching
®
losses are addressed with Power MOS 7 by significantly lowering R
DS(ON)
®
and Q
g
. Power MOS 7 combines lower conduction and switching losses
along with exceptionally fast switching speeds inherent with APT's
patented metal gate structure.
•
Lower Input Capacitance
•
Increased Power Dissipation
•
Lower Miller Capacitance
•
Easier To Drive
•
Lower Gate Charge, Qg
•
Popular
T-MAX™
or TO-264 Package
•
FAST RECOVERY BODY DIODE
MAXIMUM RATINGS
Symbol
V
DSS
I
D
I
DM
V
GS
V
GSM
P
D
T
J
,T
STG
T
L
I
AR
E
AR
E
AS
Parameter
Drain-Source Voltage
Continuous Drain Current @ T
C
= 25°C
Pulsed Drain Current
1
T-MAX™
LFLL
D
G
S
All Ratings: T
C
= 25°C unless otherwise specified.
APT5010B2FLL_LFLL
UNIT
Volts
Amps
500
46
184
±30
±40
520
4.0
-55 to 150
300
50
50
4
Gate-Source Voltage Continuous
Gate-Source Voltage Transient
Total Power Dissipation @ T
C
= 25°C
Linear Derating Factor
Operating and Storage Junction Temperature Range
Lead Temperature: 0.063" from Case for 10 Sec.
Avalanche Current
1
Volts
Watts
W/°C
°C
Amps
mJ
(Repetitive and Non-Repetitive)
1
Repetitive Avalanche Energy
Single Pulse Avalanche Energy
1600
STATIC ELECTRICAL CHARACTERISTICS
Symbol
BV
DSS
R
DS(on)
I
DSS
I
GSS
V
GS(th)
Characteristic / Test Conditions
Drain-Source Breakdown Voltage (V
GS
= 0V, I
D
= 250µA)
Drain-Source On-State Resistance
2
MIN
TYP
MAX
UNIT
Volts
500
0.100
250
1000
±100
3
5
(V
GS
= 10V, I
D
= 23A)
Ohms
µA
nA
Volts
Zero Gate Voltage Drain Current (V
DS
= 500V, V
GS
= 0V)
Zero Gate Voltage Drain Current (V
DS
= 400V, V
GS
= 0V, T
C
= 125°C)
Gate-Source Leakage Current (V
GS
= ±30V, V
DS
= 0V)
Gate Threshold Voltage (V
DS
= V
GS
, I
D
= 2.5mA)
CAUTION:
These Devices are Sensitive to Electrostatic Discharge. Proper Handling Procedures Should Be Followed.

APT5010B2FLLG Related Products

APT5010B2FLLG APT5010LFLLG
Description Discrete Semiconductor Modules Power FREDFET - MOS7 Discrete Semiconductor Modules Power FREDFET - MOS7
Is it lead-free? Lead free Lead free
Is it Rohs certified? conform to conform to
Maker Microsemi Microsemi
package instruction IN-LINE, R-PSIP-T3 FLANGE MOUNT, R-PSFM-T3
Contacts 3 3
Reach Compliance Code compliant compliant
ECCN code EAR99 EAR99
Avalanche Energy Efficiency Rating (Eas) 1600 mJ 1600 mJ
Shell connection DRAIN DRAIN
Configuration SINGLE WITH BUILT-IN DIODE SINGLE WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage 500 V 500 V
Maximum drain current (ID) 46 A 46 A
Maximum drain-source on-resistance 0.1 Ω 0.1 Ω
FET technology METAL-OXIDE SEMICONDUCTOR METAL-OXIDE SEMICONDUCTOR
JESD-30 code R-PSIP-T3 R-PSFM-T3
JESD-609 code e1 e1
Number of components 1 1
Number of terminals 3 3
Operating mode ENHANCEMENT MODE ENHANCEMENT MODE
Maximum operating temperature 150 °C 150 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
Package shape RECTANGULAR RECTANGULAR
Package form IN-LINE FLANGE MOUNT
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED
Polarity/channel type N-CHANNEL N-CHANNEL
Maximum pulsed drain current (IDM) 184 A 184 A
Certification status Not Qualified Not Qualified
surface mount NO NO
Terminal surface TIN SILVER COPPER TIN SILVER COPPER
Terminal form THROUGH-HOLE THROUGH-HOLE
Terminal location SINGLE SINGLE
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED
transistor applications SWITCHING SWITCHING
Transistor component materials SILICON SILICON
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