Freescale Semiconductor, Inc.
Data Sheet: Technical Data
Document Number: MC9S08LG32
Rev. 10, 04/2015
MC9S08LG32 Series with Addendum
Covers: MC9S08LG32 and
MC9S08LG16
Rev. 10 of the MC9S08LG32 Series data sheet (covering MC9S08LG32 and MC9S08LG16) has two parts:
• The addendum to revision 9 of the data sheet, immediately following this cover page.
• Revision 9 of the data sheet, following the addendum. The changes described in the addendum have
not been implemented in the specified pages.
© 2015 Freescale Semiconductor, Inc. All rights reserved.
Freescale Semiconductor, Inc.
Data Sheet Addendum
Document Number: MC9S08LG32AD
Rev. 0, 04/2015
Addendum to Rev. 9 of the
MC9S08LG32 Series
Covers: MC9S08LG32 and
MC9S08LG16
This addendum identifies changes to Rev. 9 of the MC9S08LG32 Series data sheet (covering
MC9S08LG32 and MC9S08LG16). The changes described in this addendum have not been
implemented in the specified pages.
1
Add min values for I
IC
(DC injection current)
Table 8. DC Characteristics, Page 14
Location:
In Table 8, “DC Characteristics,” add min values for I
IC
(row number 14) as follows:
Num
14
C
D
DC injection
current
5, 6, 7
V
IN
< V
SS
(min)
V
IN
> V
DD
(max)
Characteristic
Single pin limit
Total MCU limit, includes sum of
all stressed pins
Symbol
I
IC
Min
-0.2
-5
Typ
1
—
—
Max
2
25
Unit
mA
mA
2
Change the max value of t
LPO
(low power oscillator
period)
Table 14. Control Timing, Page 29
Location:
In Table 14, “Control Timing,” change the max value of t
LPO
(row number 2) from 1300 to 1500 µs.
© 2015 Freescale Semiconductor, Inc. All rights reserved.
Freescale Semiconductor
Data Sheet: Technical Data
Document Number: MC9S08LG32
Rev. 9 , 09/2011
MC9S08LG32 Series
Covers: MC9S08LG32 and
MC9S08LG16
MC9S08LG32
80-LQFP
Case 917A
14 mm × 14 mm
64-LQFP
Case 840F
10 mm × 10 mm
Features
48-LQFP
• 8-bit HCS08 Central Processor Unit (CPU)
Case 932
7 mm × 7mm
– Up to 40 MHz CPU at 5.5 V to 2.7 V across temperature
– On-Chip in-circuit emulator (ICE) debug module containing
range of –40 °C to 85 °C and –40 °C to 105 °C
three comparators and nine trigger modes; eight deep FIFO
– HCS08 instruction set with added BGND instruction
for storing change-of-flow addresses and event-only data;
– Support for up to 32 interrupt/reset sources
debug module supports both tag and force breakpoints
• On-Chip Memory
• Peripherals
– 32 KB or 18 KB dual array flash; read/program/erase
–
LCD
— Up to 4 × 41 or 8 × 37 LCD driver with internal
over full operating voltage and temperature
charge pump.
– 1984 byte random access memory (RAM)
–
ADC
— Up to 16-channel, 12-bit resolution, 2.5
s
– Security circuitry to prevent unauthorized access to
conversion time, automatic compare function, temperature
RAM and flash contents
sensor, internal bandgap reference channel, runs in stop3 and
• Power-Saving Modes
can wake up the system, fully functional from 5.5 V to 2.7 V
– Two low-power stop modes (stop2 and stop3)
–
SCI
— Full duplex non-return to zero (NRZ), LIN master
– Reduced-power wait mode
extended break generation, LIN slave extended break
– Peripheral clock gating register can disable clocks to
detection, wakeup on active edge
unused modules, thereby reducing currents
–
SPI
— Full-duplex or single-wire bidirectional,
– Low power On-Chip crystal oscillator (XOSC) that can
double-buffered transmit and receive, master or slave mode,
be used in low-power modes to provide accurate clock
MSB-first or LSB-first shifting
source to real time counter and LCD controller
–
IIC
— With up to 100 kbps with maximum bus loading,
– 100
s
typical wakeup time from stop3 mode
multi-master operation, programmable slave address,
• Clock Source Options
interrupt driven byte-by-byte data transfer, supports
– Oscillator (XOSC) — Loop-control Pierce oscillator;
broadcast mode and 10-bit addressing
crystal or ceramic resonator range of 31.25 kHz to
–
TPMx
— One 6 channel and one 2 channel, selectable input
38.4 kHz or 1 MHz to 16 MHz
capture, output compare, or buffered edge or center-aligned
– Internal Clock Source (ICS) — Internal clock source
PWM on each channel
module containing a frequency-locked-loop (FLL)
–
MTIM
— 8-bit counter with match register,, four clock
controlled by internal or external reference; precision
sources with prescaler dividers, can be used for periodic
trimming of internal reference allows 0.2% resolution
wakeup
and 2% deviation over temperature and voltage; supports
–
RTC
— 8-bit modulus counter with binary or decimal based
bus frequencies from 1 MHz to 20 MHz.
prescaler, three clock sources including one external source,
• System Protection
can be used for time base, calendar, or task scheduling
– COP reset with option to run from dedicated 1 kHz
functions
internal clock or bus clock
–
KBI
— One keyboard control module capable of supporting
– Low-voltage warning with interrupt
8 × 8 keyboard matrix
– Low-voltage detection with reset
–
IRQ
— External pin for wakeup from low-power modes
– Illegal opcode detection with reset
• Input/Output
– Illegal address detection with reset
– 39, 53, or 69 GPIOs
– Flash and RAM protection
– 8 KBI and 1 IRQ interrupt with selectable polarity
• Development Support
– Hysteresis and configurable pullup device on all input pins,
– Single-wire background debug interface
configurable slew rate and drive strength on all output pins.
– Breakpoint capability to allow single breakpoint setting
• Package Options
during in-circuit debugging and plus two more
– 48-pin LQFP, 64-pin LQFP, and 80-pin LQFP
breakpoints in On-Chip debug module
Freescale reserves the right to change the detail specifications as may be required to permit
improvements in the design of its products.
© Freescale Semiconductor, Inc., 2009-2011. All rights reserved.
Table of Contents
1
2
Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
2.2 Parameter Classification . . . . . . . . . . . . . . . . . . . . . . . .10
2.3 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . .10
2.4 Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . .11
2.5 ESD Protection and Latch-Up Immunity . . . . . . . . . . . .12
2.6 DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
2.7 Supply Current Characteristics . . . . . . . . . . . . . . . . . . .17
2.8 External Oscillator (XOSC) Characteristics . . . . . . . . .22
2.9 Internal Clock Source (ICS) Characteristics . . . . . . . . .24
2.10 ADC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .25
2.11 AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . .29
2.11.1 Control Timing . . . . . . . . . . . . . . . . . . . . . . . . . .29
2.11.2 TPM Module Timing . . . . . . . . . . . . . . . . . . . . .30
2.11.3 SPI Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31
2.12 LCD Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
2.13 Flash Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . .34
2.14 EMC Performance. . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
2.14.1 Radiated Emissions . . . . . . . . . . . . . . . . . . . . . .35
2.14.2 Conducted Transient Susceptibility . . . . . . . . . .35
Ordering Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38
3.1 Device Numbering System . . . . . . . . . . . . . . . . . . . . . .39
Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39
4.1 Mechanical Drawings . . . . . . . . . . . . . . . . . . . . . . . . . .39
4.1.1 80-pin LQFP . . . . . . . . . . . . . . . . . . . . . . . . . . .40
4.1.2 64-pin LQFP . . . . . . . . . . . . . . . . . . . . . . . . . . .43
4.1.3 48-pin LQFP . . . . . . . . . . . . . . . . . . . . . . . . . . .46
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48
Figure 17.Internal Oscillator Deviation from Trimmed Frequency 25
Figure 18.ADC Input Impedance Equivalency Diagram. . . . . . . 26
Figure 19.Reset Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 20.IRQ/KBIPx Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 21.Timer External Clock . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 22.Timer Input Capture Pulse . . . . . . . . . . . . . . . . . . . . . 30
Figure 23.SPI Master Timing (CPHA = 0) . . . . . . . . . . . . . . . . . 32
Figure 24.SPI Master Timing (CPHA =1) . . . . . . . . . . . . . . . . . . 32
Figure 25.SPI Slave Timing (CPHA = 0) . . . . . . . . . . . . . . . . . . 33
Figure 26.SPI Slave Timing (CPHA = 1) . . . . . . . . . . . . . . . . . . 33
Figure 27.4 MHz, Positive Polarity Pins 1 – 41 . . . . . . . . . . . . . 36
Figure 28.4 MHz, Positive Polarity Pins 42 – 80 . . . . . . . . . . . . 36
Figure 29.4 MHz, Negative Polarity Pins 1 – 41. . . . . . . . . . . . . 37
Figure 30.4 MHz, Negative Polarity Pins 42 – 80. . . . . . . . . . . . 37
Figure 31.Device Number Example for Auto Parts. . . . . . . . . . . 39
Figure 32.Device Number Example for IMM Parts. . . . . . . . . . . 39
Figure 33.80-pin LQFP Package Drawing
(Case 917A, Doc #98ASS23237W) . . . . . . . . . . . . . . . . . . . . . . 42
Figure 34.64-pin LQFP Package Drawing
(Case 840F, Doc #98ASS23234W) . . . . . . . . . . . . . . . . . . . . . . 45
Figure 35.48-pin LQFP Package Drawing
(Case 932, Doc #98ASH00962A) . . . . . . . . . . . . . . . . . . . . . . . 47
3
4
List of Tables
Table 1. MC9S08LG32 Series Features by MCU and Package . 4
Table 2. Pin Availability by Package Pin-Count . . . . . . . . . . . . . . 8
Table 3. Parameter Classifications . . . . . . . . . . . . . . . . . . . . . . 10
Table 4. Absolute Maximum Ratings. . . . . . . . . . . . . . . . . . . . . 11
Table 5. Thermal Characteristics. . . . . . . . . . . . . . . . . . . . . . . . 11
Table 6. ESD and Latch-Up Test Conditions . . . . . . . . . . . . . . . 12
Table 7. ESD and Latch-Up Protection Characteristics. . . . . . . 13
Table 8. DC Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 9. Supply Current Characteristics. . . . . . . . . . . . . . . . . . 17
Table 10.Oscillator Electrical Specifications
(Temperature Range = –40
C
to 105
C
Ambient) . . . . . . . . . . 22
Table 11.ICS Frequency Specifications
(Temperature Range = –40
C
to 105
C
Ambient) . . . . . . . . . . 24
Table 12.12-bit ADC Operating Conditions . . . . . . . . . . . . . . . . 25
Table 13.12-bit ADC Characteristics
(V
REFH
= V
DDAD
, V
REFL
= V
SSAD
) . . . . . . . . . . . . . . . . . . . . . . . 27
Table 14.Control Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Table 15.TPM Input Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Table 16.SPI Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Table 17.LCD Electricals, 3 V Glass . . . . . . . . . . . . . . . . . . . . . 34
Table 18.Flash Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Table 19.Radiated Emissions, Electric Field . . . . . . . . . . . . . . . 35
Table 20.Conducted Susceptibility, EFT/B . . . . . . . . . . . . . . . . . 35
Table 21.Susceptibility Performance Classification . . . . . . . . . . 38
Table 22.Device Numbering System . . . . . . . . . . . . . . . . . . . . . 38
Table 23.Package Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . 39
Table 24.Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
5
List of Figures
Figure 1. MC9S08LG32 Series Block Diagram . . . . . . . . . . . . . . 3
Figure 2. 80-Pin LQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 3. 64-Pin LQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 4. 48-Pin LQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 5. Typical Low-side Drive (sink) characteristics –
High Drive (PTxDSn = 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 6. Typical Low-side Drive (sink) characteristics –
Low Drive (PTxDSn = 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 7. Typical High-side Drive (source) characteristics –
High Drive (PTxDSn = 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 8. Typical High-side Drive (source) characteristics –
Low Drive (PTxDSn = 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 9. Typical Run I
DD
for FBE Mode at 1 MHz. . . . . . . . . . . 19
Figure 10.Typical Run I
DD
for FBE Mode at 20 MHz . . . . . . . . . 20
Figure 11.Typical Run I
DD
for FEE Mode at 1 MHz . . . . . . . . . . 20
Figure 12.Typical Run I
DD
for FEE Mode at 20 MHz . . . . . . . . . 21
Figure 13.Typical Stop2 I
DD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 14.Typical Stop3 I
DD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 15.Typical Crystal or Resonator Circuit: High Range and Low
Range/High Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 16.Typical Crystal or Resonator Circuit: Low Range/Low
Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
MC9S08LG32 Series Data Sheet, Rev. 9
2
Freescale Semiconductor
HCS08 CORE
PORT A
CPU
INT
BKGD/MS
On-Chip ICE (ICE) and
DEBUG MODULE (DBG)
Real Time Counter
(RTC)
Modulo Timer
(MTIM)
TMRCLK
PORT B
BKGD
BKP
LCD28/ADC5/TPMCLK/PTA7
LCD27/ADC4/TPM2CH1/KBI7/PTA6
LCD26/ADC3/TPM2CH0/KBI6/PTA5
LCD25/ADC2/RX2/KBI5/PTA4
LCD24/ADC1/TX2/KBI4/PTA3
LCD23/ADC0/SDA/PTA2
LCD22/SCL/PTA1
LCD21/PTA0
LCD[40:37]/PTB[7:4]
LCD[32:29]/PTB[3:0]
HCS08 SYSTEM CONTROL
RESETS AND INTERRUPTS
MODES OF OPERATION
POWER MANAGEMENT
COP
IRQ
LVD
RESET
IRQ
SERIAL PERIPHERAL
INTERFACE (SPI)
SS
SPSCK
MISO
MOSI
SCL
USER FLASH A
(LG32 = 16K BYTES)
(LG16 = 2K BYTES)
IIC MODULE (IIC)
SDA
TPM2CH[5:0]
TPMCLK
TPM1CH[1:0]
TPMCLK
PORT D
PORT C
8-BIT KEYBOARD
INTERRUPT (KBI)
KBI[7:0]
RESET/PTC6
BKGD/MS/PTC5
LCD[20:16]/PTC[4:0]
LCD[7:0]/PTD[7:0]
6-CHANNEL TIMER/PWM
(TPM2)
PORT E
LCD[15:8]/PTE[7:0]
USER FLASH B
(LG32 = 16K BYTES)
(LG16 = 16K BYTES)
2-CHANNEL TIMER/PWM
(TPM1)
SERIAL COMMUNICATIONS
INTERFACE (SCI1)
SERIAL COMMUNICATIONS
INTERFACE (SCI2)
XTAL
TxD1
RxD1
USER RAM
1984 BYTES
TxD2
RxD2
PORT G
EXTAL/PTF7
XTAL/PTF6
TPM2CH3/KBI2/MOSI/PTF5
TPM2CH4/KBI1/MISO/PTF4
TPM2CH5/KBI0/SS/PTF3
ADC14/IRQ/TPM1CH1/SPSCK/PTF2
ADC13/TPM1CH0/RX1/PTF1
ADC12/TPM2CH2/KBI3/TX1/PTF0
LCD[44:41]/PTG[7:4]
LCD[36:33]/PTG[3:0]
INTERNAL CLOCK
Source (ICS)
LOW-POWER OSCILLATOR
V
LL3_2
EXTAL
12-BIT
ANALOG-TO-DIGITAL
CONVERTER (ADC)
PORT H
PORT F
V
LL3
V
LL1
V
LL2
V
CAP1
V
CAP2
LCD[44:0]
V
DD
V
SS
V
SS2
LIQUID CRYSTAL
DISPLAY DRIVER
(LCD)
AD[15:0]
TPM2CH4/KBI1/PTH7
ADC15/KBI0/TPM2CH5/PTH6
ADC11/TPM1CH0/KBI3/TX1/PTH5
ADC10/TPM1CH1/KBI2/RX1/PTH4
ADC[9:6]/KBI[7:4]/PTH[3:0]
SS/SCL/TPM2CH0/PTI5
SPSCK/SDA/TPM2CH1/PTI4
MOSI/TPM2CH2/PTI3
MISO/TPM2CH3/PTI2
TX2/TMRCLK/PTI1
RX2/PTI0
VOLTAGE
REGULATOR
V
DDA
/V
REFH
V
SSA
/V
REFL
Available only on 80-pin package
Available only on 64-pin and 80-pin package
*/Default
function out of reset/*
Figure 1. MC9S08LG32 Series Block Diagram
MC9S08LG32 Series Data Sheet, Rev. 9
Freescale Semiconductor
3
PORT I
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