SY89645L
Precision Low Skew, 1-to-4
LVCMOS/LVTTL-to-LVDS Fanout Buffer
General Description
The SY89645L is a 3.3V, fully differential, low skew, 1:4
LVDS fanout buffer that accepts LVTTL or LVCMOS
inputs. It is capable of processing clock signals as fast as
650MHz. The LVDS signals are optimized to provide less
than 40ps of output skew.
The single-ended input takes a 3.3V LVTTL or LVCMOS,
with a signal swing as small as 1.2V. The outputs are
280mV LVDS, with fast rise and fall times, guaranteed to
be less than 400ps.
The SY89645L operates from a 3.3V + 5% power supply
and is guaranteed over the full industrial temperature
range (–40°C to +85°C). The SY89645L is part of Micrel’s
Precision Edge
®
product line.
Data sheets and support documentation can be found on
Micrel’s web site at:
www.micrel.com.
Precision Edge
®
Features
•
•
•
•
•
•
•
•
•
•
Four identical LVDS outputs
CLKIN accepts LVCMOS or LVTTL input levels
Maximum output frequency: 650MHz
Translates LVCMOS/LVTTL input signals to LVDS levels
<40ps output-to-output skew
<3ns propagation delay
<400ps rise/fall times
3.3V ±5% operating supply
Industrial temperature range: –40°C to +85°C
Available in 20-pin TSSOP
Block Diagram
Applications
•
Communications
•
High-performance computing
•
Clock and data distribution
Markets
•
•
•
•
•
Datacom
Telecom
Storage
ATE
Test and Measurement
Precision Edge is a registered trademark of Micrel, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (
408
) 944-0800 • fax + 1 (408) 474-1000 •
http://www.micrel.com
June 2011
M9999-060711
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY89645L
Ordering Information
Part Number
SY89645LK4G
SY89645LK4GTR
(2)
Notes:
1.
2.
Contact factory for die availability. Dice are guaranteed at T
A
= 25°C, DC Electricals only.
Tape and Reel.
Package Type
K4-20-1
K4-20-1
Operating Range
Industrial
Industrial
Package Marking
SY89645LK4G with
Pb-Free bar-line indicator
SY89645LK4G with
Pb-Free bar-line indicator
Lead Finish
NiPdAu
Pb-Free
NiPdAu
Pb-Free
Pin Configuration
20-Pin TSSOP (K4-20-1)
Pin Description
Pin Number
1, 9, 13
2
3, 5, 6, 7, 8
4
10, 18
11, 12
14, 15
16, 17
19, 20
Pin Name
GND
CLK_EN
NC
CLKIN
VCC
/Q3, Q3
/Q2, Q2
/Q1, Q1
/Q0, Q0
LVDS Differential Output Pairs: Differential buffered copies of the input signal. The output swing is
typically 280mV. Normally terminated with 100Ω across the output pairs (Q and /Q). See “LVDS
Output Termination” section.
Pin Function
Power Supply Ground.
Clock Enable. When LOW, Q outputs are forced low, /Q outputs are forced high. The synchronous
nature of the enable function forces the output clocks to enable or disable following a rising and a
falling edge of the input clock. When HIGH, clock outputs follow input clock. Internal 50kΩ pull-up
resistor. V
TH
= V
CC
/2. See “Clock Enable (CLK_EN) Description” section.
No Connect.
LVCMOS/LVTTL Clock Input. This is the input to the device. Input accepts single-ended input signals
as small as 1.2V. V
TH
= V
CC
/2. Internal 50kΩ pull-down resistor.
Positive Supply Pins. Connect to 3.3V supply, bypass with low ESR capacitors, as close to pins as
possible.
June 2011
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M9999-060711
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY89645L
Absolute Maximum Ratings
(1)
Supply Voltage (V
CC
)............................... –0.5V to +4.6V
Input Voltage (V
IN
) ............................ –0.5V to V
CC
+0.3V
LVDS Output Current (I
OUT
)..................................±10mA
Lead Temperature (soldering, 20sec.).................. 260°C
Storage Temperature (T
s
) ....................–65°C to +150°C
Operating Ratings
(2)
Supply Voltage (V
IN
)............................. +3.135V to +3.465V
Ambient Temperature (T
A
) ..........................–40°C to +85°C
Package Thermal Resistance
(3)
TSSOP
Junction-to-Ambient (θ
JA
)
Still-Air, Multi-Layer Board..............................75°C/W
Junction-to-Case (θ
JC
)...........................................21°C/W
DC Electrical Characteristics
(4)
V
DD
= 3.3V ±5%, T
A
= –40°C to +85°C, unless otherwise stated.
Symbol
V
CC
I
CC
Parameter
Positive Supply Voltage Range
Power Supply Current
No Load
Condition
Min.
3.135
Typ.
3.3
43
Max.
3.465
60
Units
V
mA
LVCMOS/LVTTL DC Electrical Characteristics
(4)
V
CC
= 3.3V ±5%, T
A
= –40°C to +85°C, unless otherwise stated.
Symbol
V
IH
V
IL
I
IH
Parameter
Input HIGH Voltage
CLKIN, CLK_EN
Input LOW Voltage
CLKIN, CLK_EN
Input HIGH Current
CLKIN
CLK_EN
Input LOW Current
CLKIN
CLK_EN
V
CC
= V
IN
= 3.465V
V
CC
= V
IN
= 3.465V
V
CC
= 3.465V, V
IN
= 0V
V
CC
= 3.465V, V
IN
= 0V
-70
-150
Condition
Min.
2
-0.3
Typ.
Max.
V
CC
+0.15
0.8
150
70
Units
V
V
µA
I
IL
µA
LVDS Outputs DC Electrical Characteristics
(4)
V
CC
= 3.3V ±5%, R
L
= 100Ω across the outputs, T
A
= –40°C to +85°C, unless otherwise stated.
Symbol
V
OUT
V
DIFF_OUT
V
OCM
ΔV
OCM
Parameter
Output Voltage Swing
Differential Output Voltage Swing
Output Common Mode Voltage
Change in Common Mode
Voltage
Condition
See Figure 1a
See Figure 1b
Min.
200
400
1.125
Typ.
280
560
1.25
5
1.375
25
Max.
Units
mV
mV
V
mV
Notes:
1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied
at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratings conditions for extended
periods may affect device reliability.
2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3.
ψ
JB
and
θ
JA
values are determined for a 4-layer board in still-air number, unless otherwise stated.
4. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
June 2011
4
M9999-060711
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY89645L
AC Electrical Characteristics
(5)
V
CC
= +3.3V ±5%, R
L
= 100Ω across the outputs, T
A
= –40°C to +85°C, unless otherwise stated.
Symbol
f
MAX
t
PD
t
SKEW
t
r,
t
f
Parameter
Maximum Frequency
Propagation Delay
Output Skew
Part-to-Part Skew
Output Rise/Fall Times
(20% to 80%)
Duty Cycle
Notes:
5.
6.
7.
8.
All parameters measured at f
MAX
≤
650MHz, unless otherwise stated.
Measured from V
CC
/2 of the input to the differential output crossing point.
Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at V
CC
/2 of the input to the differential
output crossing point.
Defined as skew between outputs on different devices operating at the same supply voltages and with equal load conditions. Using the same type
of inputs on each device, the outputs are measured at the differential cross points.
Condition
V
OUT
> 140mV
f
MAX
≤
650MHz, Note 6
Note 7
Note 8
f
MAX
≤
266MHz
f
MAX
≤
266MHz
f
MAX
> 266MHz
Min.
650
1.0
Typ.
1.8
Max.
3.0
40
500
Units
MHz
ns
ps
ps
ps
%
%
150
45
40
250
400
55
60
Timing Diagram
Clock Enable (CLK_EN) Description
The enable function is synchronous so that the clock
outputs will be enabled or disabled following a rising and
a falling edge of the input clock.
June 2011
5
M9999-060711
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY89645L
Typical Operating Techniques
V
CC
= 3.3V ± 5%; V
IN
> 2V; T
A
= 25°C, R
L
= 100Ω across output pair; unless otherwise stated.
June 2011
6
M9999-060711
hbwhelp@micrel.com
or (408) 955-1690
Embedded System
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