MGA-565P8
20 dBm P
sat
High Isolation Buffer Amplifier
Data Sheet
Description
The MGA-565P8 is designed for use in LO chains to drive
high dynamic range passive mixers. It provides high
isolation, high gain, and consistent output power. It is
a GaAs MMIC, fabricated using Avago Technologies’ cost
effective, reliable enhancement mode PHEMT (Pseu-
domorphic High Electron Mobility Transistor)
[1]
process.
This device is housed in the LPCC 2x2 mm package. This
package offers good thermal dissipation and RF charac-
teristics.
MGA-565P8 features a saturated power of 20 dBm (with
0 dBm input power) and reverse isolation in excess of
40 dB at 2 GHz. The saturated output power can be set
between 9 dBm and 20 dBm using an external resistor,
with a corresponding adjustment in current consump-
tion.
Notes:
1. Enhancement mode technology employs a single positive V
gs
,
eliminating the need of negative gate voltage associated with
conventional depletion mode devices.
2. Conform to JEDEC reference outline MO229 for DRP-N
Features
•
Up to 3.5 GHz operating frequency
•
2:1 VSWR input and output at 2GHz
•
Small package size:
2.0 x 2.0 x 0.75 mm LPCC
[3]
•
MSL-1 and lead-free
•
Tape-and-reel packaging option available
Specifications
@ 2 GHz, V
d
= 5V, P
in
= 0 dBm
•
P
sat
= 20 dBm
•
I
dsat
= 67 mA
•
Isolation = 42 dB
•
Small Signal Gain = 22 dB
Applications
•
VCO buffer amplifier for Cellular/PCS or other wireless
infrastructures
Pin Connections and Package Marking
½
(Thermal/RF Gnd)
Pin 8 GND
Pin 7½
(RFout/VD1)
Pin 6 (VD2)
Pin 5 (VD3)
Pin 1 GND
Pin 2 (RFin)
Pin 3 GND
Pin 4 GND
Simplified Schematic
Vd
Id
Rbias
5
2
RFin
6
7
RFout
1, 3, 4, 8
GND
LO
Bottom View
Pin 1
Pin 2
Pin 3
Pin 4
Pin 8
1Bx
Top View
Pin 7
Pin 6
Pin 5
Attention: Observe precautions for
handling electrostatic sensitive devices.
ESD Machine Model (Class A)
ESD Human Body Model (Class 0)
Refer to Avago Application Note A004R:
Electrostatic Discharge Damage and Control.
Note:
Package marking provides orientation and identification
“1B” = Device Code
“x” = Data code indicates the month of manufacture.
MGA-565P8 Absolute Maximum Ratings
[1]
Symbol
V
d
P
diss
P
in
max.
T
CH
T
STG
θ
ch_b
Parameter
DC Supply Voltage
Total Power Dissipation
[2]
RF Input Power (Vd = 5V)
Channel Temperature
Storage Temperature
Thermal Resistance
[3]
ESD (Human Body Model)
ESD (Machine Model)
Units
V
mW
dBm
°C
°C
°C/W
V
V
Absolute
Maximum
8
448
15
150
-65 to 150
91
100
30
Notes:
1. Operation of this device in excess of
any one of these parameters may cause
permanent damage.
2. Board (package belly) temperature T
B
is
25°C. Derate 11 mW/°C for T
B
> 109°C.
3. Channel-to-board thermal resistance
measured using 150°C Liquid Crystal
Measurement method.
Electrical Specifications
T
A
= 25°C, Frequency = 2 GHz, R
bias
= 0Ω (unless specified otherwise)
Symbol
P
sat
I
dsat
ISL
[1]
Gain
I
ds
RL
[1]
Parameter and Test Condition
Saturated Power at 0 dBm input
Saturation Current
Reverse Isolation
Small Signal Gain
Small Signal Current (P
in
= -10 dBm)
Return Loss
Input
Output
Vd = 5V
[1]
Vd = 3V
Vd = 5V
[1]
Vd = 3V
Vd = 5V
[1]
Vd = 3V
Vd = 5V
[1]
Vd = 3V
Units
dBm
dBm
mA
mA
dB
dB
mA
dB
Min.
18.5
58
42
20
33
Typ.
20
17
67
45
50
21.8
20
37
27
-8
-10
Max.
23.5
Notes:
1. Typical value determined from a sample size of 500 parts from 3 wafers.
2. Measurement obtained using production test board described in the block diagram below. Circuit losses have been de-embedded from
actual measurements.
R
bias
0 Ohm
12 nH
5
2
Buffer
Amplifier
22 pF
6
7
8
22 pF
22 pF
1 3
4
Figure 1. Production Test Circuit Schematic at 2 GHz.
2
_
1000 pF
+
5V
Product Consistency Distribution Charts at 2 GHz
[1, 2]
200
160
120
80
40
0
Cpk = 1.20
Std. Dev. = 0.46
200
160
120
80
40
0
Cpk = 1.2
Std. Dev. = 0.2
19
20
21
22
23
24
18
18.5
19
19.5
Psat (dBm)
20
20.5
21
GAIN (dB)
Figure 2. Gain Distribution.½
LSL = 20.0 dB, USL = 23.5 dB.
160
Figure 3. Psat Distribution.½
LSL = 18.5 dBm, USL = 20.6
240½
200½
160½
Cpk = 1.12
Std. Dev. = 2.7
Cpk = 1.03
Std. Dev. = 2.0
120
80
120½
80½
40
40½
0
66
0
58
62
70
74
78
42
45
48
51
54
57
Idsat (mA)
ISOLATION (dB)
Figure 4. Idsat Distribution.½
LSL = 58.0 dBm, USL = 78.0 dBm.
Figure 5. Isolation Distribution.½
LSL = 42.0 dB, USL = 56.0 dB.
Notes:
1. Statistical distribution determined from a sample size of 500 parts from 3 wafers.
2. Future wafers allocated to this product may have typical values anywhere between the
minimum and maximum specification limits.
3
MGA-565P8 Typical Performance Curves (at 25°C, 2 GHz, R
bias
= 0Ω, unless specified otherwise)
18
16
P
out
(dBm)
P
out
(dBm)
21½
19½
17½
15½
13½
11
25 C
85 C
-40 C
46
45
ISOLATION (dB)
14
12
10
8
25 C
85 C
-40 C
44
43
42
41
40
-10
-10
-8
-6
-4
-2
0
2
4
-10
-8
-6
-4
-2
0
2
4
-8
-6
-4
-2
0
2
4
6
P
in
(dBm)
P
in
(dBm)
RF INPUT (dBm)
Figure 6. P
out
vs. P
in
, V
d
= 3V.
Figure 7. P
out
vs. P
in
, Vd = 5V.
Figure 8. Isolation vs P
in
, Vd = 3V.
46
45
ISOLATION (dB)
44
43
42
41
40
-10
-8
-6
-4
-2
0
2
4
6
RF INPUT (dBm)
Figure 9. Isolation vs. P
in
, Vd = 5V.
4
MGA-565P8 Typical Performance Curves (R
bias
= 0Ω, temperature variation)
20½
19½
18½
17½
P
sat
(dBm)
P
sat
(dBm)
24½
22½
20½
18½
16½
14½
12½
2000
FREQUENCY (MHz)
3500
10
800
2000
FREQUENCY (MHz)
3500
25 C, 5V
85 C, 5V
-45 C, 5V
55½
50½
45½
40½
I
dsat
(mA)
16½
15½
14½
13½
12½
11
10
800
25 C, 3V
85 C, 3V
-45 C, 3V
35½
30½
25½
20½
15½
10
800
2000
FREQUENCY (MHz)
3500
25 C, 3V
85 C, 3V
-45 C, 3V
Figure 10. P
sat
vs. Frequency. ½
(P
in
= 0 dBm, V
d
= 3V)
90½
80½
70½
I
dsat
(mA)
Figure 11. P
sat
vs. Frequency. ½
(P
in
= 0 dBm, V
d
= 5V)
28½
26½
24½
22½
GAIN (dB)
Figure 12. I
dsat
vs. Frequency. ½
(P
in
= 0 dBm, V
d
= 3V)
30½
28½
26½
24½
GAIN (dB)
60½
50½
40½
30½
20½
10
800
2000
FREQUENCY (MHz)
3500
25 C, 5V
85 C, 5V
-45 C, 5V
20½
18½
16½
14½
12½
10
800
2000
FREQUENCY (MHz)
3500
25 C, 3V
85 C, 3V
-45 C, 3V
22½
20½
18½
16½
14½
12½
10
800
2000
FREQUENCY (MHz)
3500
25 C, 5V
85 C, 5V
-45 C, 5V
Figure 13. I
dsat
vs. Frequency.½
(P
in
= 0 dBm, V
d
= 5V)
Figure 14. Gain vs. Frequency. ½
(P
in
= -10 dBm, V
d
= 3V)
Figure 15. Gain vs Frequency. ½
(P
in
= -10 dBm, V
d
= 5V)
5
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