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BLD6G21LS-50112

Description
RF MOSFET Transistors N-CH 65V 10.2A Trans MOSFET
Categorysemiconductor    Discrete semiconductor   
File Size1007KB,15 Pages
ManufacturerNXP
Websitehttps://www.nxp.com
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BLD6G21LS-50112 Overview

RF MOSFET Transistors N-CH 65V 10.2A Trans MOSFET

BLD6G21LS-50112 Parametric

Parameter NameAttribute value
Product CategoryRF MOSFET Transistors
ManufacturerNXP
RoHSDetails
Transistor PolarityN-Channel
Id - Continuous Drain Current10.2 A
Vds - Drain-Source Breakdown Voltage65 V
Rds On - Drain-Source Resistance520 mOhms
TechnologySi
Package / CaseSOT-1130B-5
PackagingTube
Factory Pack Quantity60
BLD6G21L-50; BLD6G21LS-50
TD-SCDMA 2010 MHz to 2025 MHz fully integrated Doherty
transistor
Rev. 3 — 1 September 2015
Product data sheet
1. Product profile
1.1 General description
The BLD6G21L-50 and BLD6G21LS-50 incorporate a fully integrated Doherty solution
using Ampleon’s state of the art GEN6 LDMOS technology. This device is perfectly suited
for TD-SCDMA base station applications at frequencies from 2010 MHz to 2025 MHz. The
main and peak device, input splitter and output combiner are integrated in a single
package. This package consists of one gate and drain lead and two extra leads of which
one is used for biasing the peak amplifier and the other is not connected. It only requires
the proper input/output match and bias setting as with a normal class-AB transistor.
Table 1.
Typical performance
RF performance at T
h
= 25
C.
Mode of operation
TD-SCDMA
[1][2]
[1]
[2]
f
(MHz)
2010 to 2025
V
DS
(V)
28
P
L(AV)
(W)
8
G
p
(dB)
14.5
D
(%)
43
ACPR
(dBc)
24
P
L(3dB)
(W)
53
Test signal: 6-carrier TD-SCDMA; PAR = 10.8 dB at 0.01 % probability on CCDF.
I
Dq
= 170 mA (main); V
GS(amp)peak
= 0 V.
CAUTION
This device is sensitive to ElectroStatic Discharge (ESD). Therefore care should be taken
during transport and handling.
1.2 Features and benefits
Typical TD-SCDMA performance at frequencies from 2010 MHz to 2025 MHz:
Average output power = 8 W
Power gain = 14.5 dB
Efficiency = 43 %
Fully optimized integrated Doherty concept:
integrated asymmetrical power splitter at input
integrated power combiner
peak biasing down to 0 V
low junction temperature
high efficiency
100 % peak power tested for guaranteed output power capability
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