EEWORLDEEWORLDEEWORLD

Part Number

Search

2M801-008-16ZN6-23PB

Description
Circular MIL Spec Connector M801 3C 3#20HD PIN PLUG THRD
CategoryThe connector   
File Size9MB,125 Pages
ManufacturerAmphenol
Websitehttp://www.amphenol.com/
Download Datasheet Parametric View All

2M801-008-16ZN6-23PB Online Shopping

Suppliers Part Number Price MOQ In stock  
2M801-008-16ZN6-23PB - - View Buy Now

2M801-008-16ZN6-23PB Overview

Circular MIL Spec Connector M801 3C 3#20HD PIN PLUG THRD

2M801-008-16ZN6-23PB Parametric

Parameter NameAttribute value
Product CategoryCircular MIL Spec Connector
ManufacturerAmphenol
16-2M-4
Micro38999
CONNECTORS
For Harsh Environments
Micro38999
2M805
Tri-Start
2M804
2M803
Push-Pull
Bayonet
2M801
Dual-Start
AEROSPACE STANDARD
The New
Show off the windbreaker I received
[i=s]This post was last edited by wangfuchong on 2014-5-30 20:43[/i] I got this by participating in the Fairchild Semiconductor event organized by EEWORLD: [url]https://bbs.eeworld.com.cn/thread-43914...
wangfuchong Talking
fpga+ dac902u problem
I'm working on an FPGA DDS function signal generator recently. I'm using a 12-bit DAC902U, but can't get it to work. Can anyone give me some advice? The schematic is attached. [img=55,49]file:///C:/Us...
绿草高原 FPGA/CPLD
How many timers does MPS430G2553 have?
I see in the documentation that 2553 has two timers, but why is there only the register definition of TIMER_A in the header file of the 430ware routine? Also, the official documentation says there are...
jishuaihu Microcontroller MCU
Has anyone used the Red Hurricane II FPGA development board? Help~
[size=5][color=red]The chip on the CY1C12 development board I have is the FPGA EP1C12Q240C8. Today I used a small program to try to light up the four seven-segment digital tubes. It uses dynamic displ...
zqzq501311 FPGA/CPLD
Windows CE6.0 USB keyboard and mouse
Hello everyone, when I am customizing the system, I want to add support for USB keyboard and mouse. May I ask which components, Reg files and BIB files I need to add?...
dragonkjl Embedded System
A few tips on XILINX FPGA design
Tips on XILINX FPGA design 1. Use a global clock buffer BUFG for the clock signal 2. Try to use only one clock edge to register data 3. Do not generate clocks internally except for the clocks generate...
cobble1 FPGA/CPLD

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 340  29  474  207  795  7  1  10  5  16 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号