EEWORLDEEWORLDEEWORLD

Part Number

Search

MCM6706RJ8R2

Description
32K x 8 Bit Static Random Access Memory
Categorystorage    storage   
File Size80KB,8 Pages
ManufacturerMotorola ( NXP )
Websitehttps://www.nxp.com
Download Datasheet Parametric Compare View All

MCM6706RJ8R2 Overview

32K x 8 Bit Static Random Access Memory

MCM6706RJ8R2 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerMotorola ( NXP )
Parts packaging codeSOJ
package instructionSOJ,
Contacts32
Reach Compliance Codeunknow
ECCN codeEAR99
Maximum access time8 ns
JESD-30 codeR-PDSO-J32
JESD-609 codee0
length20.96 mm
memory density262144 bi
Memory IC TypeSTANDARD SRAM
memory width8
Number of functions1
Number of ports1
Number of terminals32
word count32768 words
character code32000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize32KX8
Output characteristics3-STATE
ExportableYES
Package body materialPLASTIC/EPOXY
encapsulated codeSOJ
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Certification statusNot Qualified
Maximum seat height3.75 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyBICMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formJ BEND
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width7.62 mm
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document
by MCM6706R/D
32K x 8 Bit Static Random Access
Memory
The MCM6706R is a 262,144 bit static random access memory organized as
32,768 words of 8 bits, fabricated using high performance silicon–gate BiCMOS
technology. Static design eliminates the need for external clocks or timing
strobes.
Output enable (G) is a special control feature that provides increased system
flexibility and eliminates bus contention problems.
The MCM6706R meets JEDEC standards and is available in a revolutionary
pinout 300 mil, 32–lead surface–mount SOJ package.
Single 5.0 V
±
10% Power Supply
Fully Static — No Clock or Timing Strobes Necessary
All Inputs and Outputs Are TTL Compatible
Three State Outputs
Fast Access Times: MCM6706R–6 = 6 ns
MCM6706R–7 = 7 ns
MCM6706R–8 = 8 ns
Center Power and I/O Pins for Reduced Noise
MCM6706R
J PACKAGE
300 MIL SOJ
CASE 857–02
PIN ASSIGNMENT
A0
A1
A2
A3
E
DQ0
DQ1
VCC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
NC
A14
A13
A12
G
DQ7
DQ6
VSS
VCC
DQ5
DQ4
A11
A10
A9
A8
NC
BLOCK DIAGRAM
A
A
A
A
A
A
A
A
A
DQ0
INPUT
DATA
CONTROL
DQ7
A
COLUMN I/O
COLUMN DECODER
ROW
DECODER
MEMORY
MATRIX
512 ROWS x 64 x 8
COLUMNS
VCC
VSS
VSS
DQ2
DQ3
W
A4
A5
A6
A7
PIN NAMES
A0 – A14 . . . . . . . . . . . . . . . . . . Address
W . . . . . . . . . . . . . . . . . . . . Write Enable
E . . . . . . . . . . . . . . . . . . . . . . Chip Enable
G . . . . . . . . . . . . . . . . . . . Output Enable
DQ0 – DQ7 . . . . . . . . Data Input/Output
VCC . . . . . . . . . . . . + 5 V Power Supply
VSS . . . . . . . . . . . . . . . . . . . . . . . Ground
NC . . . . . . . . . . . . . . . . . No Connection
A
A
A
A
A
E
W
G
REV 1
5/95
©
Motorola, Inc. 1995
MOTOROLA FAST SRAM
MCM6706R
1

MCM6706RJ8R2 Related Products

MCM6706RJ8R2 MCM6706RJ6R2 MCM6706R MCM6706J6
Description 32K x 8 Bit Static Random Access Memory 32K x 8 Bit Static Random Access Memory 32K x 8 Bit Static Random Access Memory 32K x 8 Bit Static Random Access Memory
FIR filtering of audio signals
[b][size=7][color=#ff0000]FIR[/color][color=#ff0000]Filtering of Audio Signal[/color][/size][/b][b]Design Content[/b][b]This design is based on FPGA audio signal FIR low-pass filtering. According to t...
daxigua FPGA/CPLD
About crosstalk
My understanding is that there is capacitance or inductance between the two lines, and when transmitting signals, they will pass Capacitors and inductors interfere with each other, and the closer the ...
jialaolian PCB Design
【Transfer】EC electromagnetic calculation software
[font=楷体_GB2312][size=3]1[size=9pt]. Effectively solve the impedance calculation of transmission lines. [/size][/size][/font][size=9pt] [/size][size=3][font=楷体_GB2312][size=9pt]a.[/size][size=9pt]The ...
lixiaohai8211 Analog electronics
Request for boost board circuit diagram
[i=s] This post was last edited by paulhyde on 2014-9-15 09:16 [/i] I am now looking for a circuit diagram of a boost board inside a mobile phone charger, with an input of 4.2V and an output of 6V. I ...
vckele Electronics Design Contest
It is recommended that you write the content of the information as clearly as possible when uploading it.
As the title says, it is a very meaningful thing for everyone to share their own information, but good information is not suitable for everyone. I have downloaded it several times. The title seems to ...
dongning Analog electronics
The Problem with FPGAs
[i=s]This post was last edited by paulhyde on 2014-9-15 09:09[/i] In the national competition, which aspect of FPGA application is more common? (Hardware or software)...
非图后来之福报 Electronics Design Contest

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1232  1991  276  1534  756  25  41  6  31  16 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号