MCM32A764SG33 datasheet, PDF - EEWORLD Datasheet

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MCM32A764SG33: Description128KB/256KB Secondary Cache Module With Tag, Valid, and Dirty for i486 Processor Systems; Categorystorage storage; File Size82KB，12 Pages; ManufacturerMotorola ( NXP ); Websitehttps://www.nxp.com

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MCM32A764SG33 Overview

128KB/256KB Secondary Cache Module With Tag, Valid, and Dirty for i486 Processor Systems

MCM32A764SG33 Parametric

Parameter Name	Attribute value
Maker	Motorola ( NXP )
package instruction	DIMM, DIMM112
Reach Compliance Code	unknow
ECCN code	3A991.B.2.A
Maximum access time	25 ns
Other features	BYTE WRITE; 16K X 10 CACHE TAG; 16K X 1 DIRTY BIT
I/O type	COMMON
JESD-30 code	R-XDMA-N112
memory density	2097152 bi
Memory IC Type	CACHE TAG SRAM MODULE
memory width	32
Number of functions	1
Number of ports	1
Number of terminals	112
word count	65536 words
character code	64000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	64KX32
Output characteristics	3-STATE
Exportable	YES
Package body material	UNSPECIFIED
encapsulated code	DIMM
Encapsulate equivalent code	DIMM112
Package shape	RECTANGULAR
Package form	MICROELECTRONIC ASSEMBLY
Parallel/Serial	PARALLEL
power supply	5 V
Certification status	Not Qualified
Maximum standby current	0.2 A
Minimum standby current	4.5 V
Maximum slew rate	1.25 mA
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	NO LEAD
Terminal pitch	1.27 mm
Terminal location	DUAL

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MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

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by MCM32A732/D

Advance Information

128KB/256KB Secondary Cache

Module

With Tag, Valid, and Dirty for i486

Processor Systems

This family of cache modules is well suited to provide the secondary cache for

the Intel 82420 PCI chipset. This family provides the 128K Byte and 256K Byte

cache sizes with valid, dirty and a choice of 7, 8, or 9 tag bits. The tag/valid bits

have 12 ns access times for zero wait states at 33 MHz clock speeds. The PD

pins map into the configuration register of the 82420 for auto–configuration of the

cache controller during system startup.

•

Low Profile Edge Connector: Burndy Part Number: CELP2X56SC3Z48

•

Single 5 V

10% Power Supply

•

All Inputs and Outputs are TTL Compatible

•

Three State Outputs

•

Fast Module Cycle Time: Up to External Processor Bus Speed of 33 MHz

•

Cache Byte Write, Bank Chip Enable, Bank Output Enable

•

Decoupling Capacitors are Used for Each Fast Static RAM

•

High Quality Multi–Layer FR4 PWB With Separate Power and Ground Planes

MCM32A732

MCM32A832

MCM32A932

MCM32A764

MCM32A864

MCM32A964

112–LEAD

CARD EDGE

CASE 1112–01

TOP VIEW

BurstRAM is a registered trademark of Motorola.

I486 is a registered trademark Intel Corp.

This document contains information on a new product. Specifications and information herein are subject to change without notice.

REV 1

6/95

Motorola, Inc. 1994

MOTOROLA FAST SRAM

MCM32A732/764•MCM32A832/864•MCM32A932/964

MCM32A764SG33 Related Products

	MCM32A764SG33	MCM32A964SG33	MCM32A932SG33	MCM32A864SG33	MCM32A832SG33	MCM32A732SG33
Description	128KB/256KB Secondary Cache Module With Tag, Valid, and Dirty for i486 Processor Systems	128KB/256KB Secondary Cache Module With Tag, Valid, and Dirty for i486 Processor Systems	128KB/256KB Secondary Cache Module With Tag, Valid, and Dirty for i486 Processor Systems	128KB/256KB Secondary Cache Module With Tag, Valid, and Dirty for i486 Processor Systems	128KB/256KB Secondary Cache Module With Tag, Valid, and Dirty for i486 Processor Systems	128KB/256KB Secondary Cache Module With Tag, Valid, and Dirty for i486 Processor Systems
Maker	Motorola ( NXP )	Motorola ( NXP )	Motorola ( NXP )	Motorola ( NXP )	Motorola ( NXP )	Motorola ( NXP )
package instruction	DIMM, DIMM112	DIMM, DIMM112	DIMM, DIMM112	DIMM, DIMM112	DIMM, DIMM112	DIMM, DIMM112
Reach Compliance Code	unknow	unknow	unknow	unknow	unknow	unknow
ECCN code	3A991.B.2.A	3A991.B.2.A	EAR99	3A991.B.2.A	EAR99	EAR99
Maximum access time	25 ns	25 ns	25 ns	25 ns	25 ns	25 ns
Other features	BYTE WRITE; 16K X 10 CACHE TAG; 16K X 1 DIRTY BIT	BYTE WRITE; 16K X 10 CACHE TAG; 16K X 1 DIRTY BIT	BYTE WRITE; 16K X 10 CACHE TAG; 8K X 1 DIRTY BIT	BYTE WRITE; 16K X 10 CACHE TAG; 16K X 1 DIRTY BIT	BYTE WRITE; 16K X 10 CACHE TAG; 8K X 1 DIRTY BIT	BYTE WRITE; 16K X 10 CACHE TAG; 8K X 1 DIRTY BIT
I/O type	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON
JESD-30 code	R-XDMA-N112	R-XDMA-N112	R-XDMA-N112	R-XDMA-N112	R-XDMA-N112	R-XDMA-N112
memory density	2097152 bi	2097152 bi	1048576 bi	2097152 bi	1048576 bi	1048576 bi
Memory IC Type	CACHE TAG SRAM MODULE	CACHE TAG SRAM MODULE	CACHE TAG SRAM MODULE	CACHE TAG SRAM MODULE	CACHE TAG SRAM MODULE	CACHE TAG SRAM MODULE
memory width	32	32	32	32	32	32
Number of functions	1	1	1	1	1	1
Number of ports	1	1	1	1	1	1
Number of terminals	112	112	112	112	112	112
word count	65536 words	65536 words	32768 words	65536 words	32768 words	32768 words
character code	64000	64000	32000	64000	32000	32000
Operating mode	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS
Maximum operating temperature	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C
organize	64KX32	64KX32	32KX32	64KX32	32KX32	32KX32
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
Exportable	YES	YES	YES	YES	YES	YES
Package body material	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED
encapsulated code	DIMM	DIMM	DIMM	DIMM	DIMM	DIMM
Encapsulate equivalent code	DIMM112	DIMM112	DIMM112	DIMM112	DIMM112	DIMM112
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY
Parallel/Serial	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL
power supply	5 V	5 V	5 V	5 V	5 V	5 V
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum standby current	0.2 A	0.2 A	0.12 A	0.2 A	0.12 A	0.12 A
Minimum standby current	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V
Maximum slew rate	1.25 mA	1.25 mA	0.75 mA	1.25 mA	0.75 mA	0.75 mA
Maximum supply voltage (Vsup)	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage (Vsup)	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V
Nominal supply voltage (Vsup)	5 V	5 V	5 V	5 V	5 V	5 V
surface mount	NO	NO	NO	NO	NO	NO
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal form	NO LEAD	NO LEAD	NO LEAD	NO LEAD	NO LEAD	NO LEAD
Terminal pitch	1.27 mm	1.27 mm	1.27 mm	1.27 mm	1.27 mm	1.27 mm
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL

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