DS2117M
Ultra3 LVD/SE SCSI Terminator
www.dalsemi.com
FEATURES
Fully compliant with Ultra2, Ultra3, and
Ultra 160/m SCSI
Provides Multimode Low Voltage
Differential/Single-Ended (LVD/SE)
termination for 9 signal line pairs
Auto-selection of LVD or SE termination
5% tolerance on SE and LVD termination
resistance
Low power down capacitance of 3 pF
Onboard thermal shutdown circuitry
SCSI bus hot plug compatible
Fully supports actively negated SE SCSI
signals
PIN ASSIGNMENT
VREF
NC
NC
R1P
R1N
R2P
R2N
HS GND
HS GND
HS GND
R3P
R3N
R4P
R4N
R5P
R5N
ISO
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
TPWR
HVD
LVD
SE
R9N
R9P
R8N
R8P
HS GND
HS GND
HS GND
R7N
R7P
R6N
R6P
DIFF_CAP
DIFFSENSE
MSTR/SLV
DS2117MB 36-Pin SSOP
DESCRIPTION
The DS2117M Ultra3 LVD/SE SCSI Terminator is both a Low Voltage Differential (LVD) and Single-
Ended (SE) terminator. The multimode operation enables the designer to implement LVD in current
products while allowing the end-user SE backward compatibility with legacy devices. If the device is
connected in an LVD-only bus, the DS2117M will use LVD termination. If any SE devices are connected
to the bus, the DS2117M will use SE termination. This is accomplished automatically inside the part by
sensing the voltage on the SCSI bus DIFFSENS line.
For the LVD termination, the DS2117M integrates two current sources with nine precision resistor
strings. For the SE termination, one regulator and nine precision 110-ohm resistors are used. Three
DS2117M terminators are needed for a wide SCSI bus.
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DS2117M
REFERENCE DOCUMENTS
Small Computer Systems Interface (SCSI-3)
Small Computer Systems Interface (SCSI-3)
Small Computer Systems Interface (SCSI-3)
Small Computer Systems Interface (SCSI-3)
SCSI Parallel Interface (SPI)
SCSI Parallel Interface 2 (SPI-2)
SCSI Parallel Interface 3 (SPI-3)
SCSI Parallel Interface 4 (SPI-4)
Project: 0855-M, 1995
Project: 1142-M, 1998
Project: 1302-D, 1999
Project: 1365-D,
xxxx
Available from:
American National Standards Institute (ANSI) Phone: (212) 642-4900
Global Engineering Documents 15 Inverness Way East; Englewood, CO 80112 Phone: (800) 854-7179
FUNCTIONAL DESCRIPTION
The DS2117 combines LVD and SE termination with DIFFSENSE sourcing and detection.
A bandgap reference is fed into two amplifiers, which creates a 1.25V reference voltage and a 2.85V
reference voltage. The control logic determines which of these references will be applied to the
termination resistors. If the SCSI bus is in LVD mode, then the 1.25V reference will be used. If the SCSI
bus is in SE mode, then the 2.85V reference will be used. That same control logic will switch in/out
parallel resistors to change the total termination resistance accordingly. Finally, in SE mode the Rp pins
will be switched to ground.
The DIFFSENSE circuitry decodes trinary logic. There will be one of three voltages on the SCSI control
line called DIFFSENS. Two comparators and a NAND gate determine if the voltage is below 0.6V, above
2.15V, or in between. That indicates the mode of the bus to be HVD, SE, or LVD, respectively.
The DS2117M’s DIFF_CAP pin monitors the DIFFSENS line to determine the proper operating mode of
the device; this mode is indicated by the SE/LVD/HVD outputs. The DIFFSENSE pin can also drive the
SCSI DIFFSENS line (when MSTR/SLV = 1) to determine the SCSI bus operating mode. The DS2117M
switches to the termination mode that is appropriate for the bus based on the value of the DIFFSENS
voltage. These modes are:
LVD mode
LVD termination is provided by a precision laser trimmed resistor string with two current
sources. This configuration yields a 105Ω=differential and 150Ω=common mode impedance. A fail-safe
bias of 112 mV is maintained when no drivers are connected to the SCSI bus.
SE mode
When the external driver for a given signal line turns off, the active terminator will pull that
signal line to 2.85 volts (quiescent state). When used with an active negation driver, the power amp can
sink 22 mA per line while keeping the voltage reference in regulation. The terminating resistors maintain
their 110Ω=value.
HVD Isolation Mode
The DS2117M identifies that there is an HVD (high voltage differential) device on
the SCSI bus and isolates the termination pins from the bus.
When ISO is pulled high, the termination pins are isolated from the SCSI bus, Vref is grounded, and the
bus mode indicators (SE/LVD/HVD) remain active. During thermal shutdown, the termination pins are
isolated from the SCSI bus, Vref is grounded, and the bus mode indicators (SE/LVD/HVD) remain
active. The
DIFFSENSE
driver is shut down during either of these two events.
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DS2117M
To ensure proper operation, the TPWR pin should be connected to the SCSI bus TERMPWR line. As
with all analog circuitry, the TERMPWR and VDD lines should be bypassed locally. A 2.2
µF
capacitor
and a 0.01
µF
high frequency capacitor is recommended between TPWR and ground and placed as close
as possible to the DS2117M. The DS2117M should be placed as close as possible to the SCSI connector
to minimize signal and power trace length, thereby resulting in less input capacitance and reflections
which can degrade the bus signals.
To maintain the specified regulation, a 4.7
µF
capacitor is required between the Vref pin (VREF) and
ground of each DS2117M. A high frequency cap (0.1
µF
ceramic recommended) can also be placed on
the Vref pin in applications that use fast rise/fall time drivers. A typical SCSI bus configuration is shown
in Figure 2.
DIFFSENS noise filtering
The DS2117M incorporates a digital filter to remove high frequency
transients on the DIFFSENS control line, thereby eliminating erroneous switching between modes. This
filter eliminates the need for the external capacitor and resistor, which heretofore performed this function.
The external filter may be used in addition to the digital filter if the DS2117M and DS2118M are to be
used interchangeably.
NOTE:
DIFFSENS – Refers to the SCSI bus signal.
DIFFSENSE – Refers to the DS2117M pin name and internal circuitry capable of driving the
DIFFSENS line.
DIFF_CAP - Refers to the DS2117M pin name and internal circuitry relating to monitoring the
DIFFSENS line.
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Analogue and Mixed Signal
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