Enpirion
®
Power Datasheet
EP5388QI 800mA PowerSoC
Synchronous Buck Regulator
With Integrated Inductor
Product Overview
The EP5388QI is a synchronous buck converter
with integrated Inductor, PWM controller,
MOSFETS, and Compensation providing the
smallest possible solution size. The EP5388QI
requires only two small MLCC capacitors to make a
complete solution. Integration of the inductor
greatly simplifies design, contains noise, reduces
part count, and reduces solution footprint. Low
output ripple ensures compatibility with RF
systems.
The EP5388QI operates at a switching frequency of
4 MHz, enabling this unprecedented level of
integration and small external components. Type III
voltage mode control is used to provide high noise
immunity and wide control loop bandwidth.
The small footprint makes this part ideal for space
constrained portable applications. Shutdown
current of <1uA extends battery life Output voltage
level is programmed via a 3-pin VID selector
providing seven pre-programmed output voltages
along with an option for external resistor divider.
Features
•
3mm x 3mm x 1.1mm QFN package
•
Only two low cost MLCC caps required
•
4 MHz switching frequency
•
High efficiency, up to 94%
•
Up to 800mA continuous output current
•
Wide 2.4V to 5.5V input range
•
V
OUT
Range: 0.6V to V
IN
– 0.5V
•
3-Pin VID output voltage programming
•
100% duty cycle capable
•
Less than 1
µA
standby current
•
Low V
OUT
ripple for RF compatibility
•
Short circuit and over current protection
•
UVLO and thermal protection
•
RoHS compliant; MSL 3 260°C reflow
Applications
•
•
•
•
•
Noise sensitive RF applications
Area constrained applications
Wireless data applications
Portable gaming devices
Personal Media Players
Advanced Mobile Processors, DSP, IO,
Memory, Video, Multimedia Engines
•
ENABLE
V
Sense
V
out
V
IN
4.7µF
0603
V
OUT
47µF
1206
V
in
EP5388QI
V
FB
V
S0
V
S1
V
S2
Voltage
Select
GND
Figure 1.
Integrated Inductor Technology
Figure 2.
Typical application circuit
1
02377
Decemeber 11, 2017
www.altera.com/enpirion
Rev G
EP5388QI
Ordering Information
Part Number
T
AMBIENT
Rating (°C)
Package Description
EP5388QI
-40 to +85
16 pin (3mm x 3mm x 1.1mm) QFN T&R
EP5388QI-E
QFN Evaluation Board
Packing and Marking Information:
www.altera.com/support/reliability/packing/rel-packing-and-marking.html
Pin Assignments (Top View)
NC(SW)
16
15
NC(SW)
NC(SW)
PGND
PGND
VFB
VSENSE
AGND
1
14
VIN
ENABLE
VS0
VS1
VS2
NC
2
3
13
12
4
11
5
10
7
Figure 3.
EP5388QI Package Pin-out
NOTE A:
NC pins are not to be electrically connected to each other or to any external signal, ground, or voltage.
However, they must be soldered to the PCB. Failure to follow this guideline may result in part malfunction or damage.
NOTE B:
White ‘dot’ on top left is pin 1 indicator on top of the device package.
Pin Description
PIN
1, 15, 16
2,3
NAME
NC(SW)
PGND
FUNCTION
NO CONNECT – These pins are internally connected to the common drain output of
the internal MOSFETs. NC(SW) pins are not to be electrically connected to any
external signal, ground, or voltage. However, they must be soldered to the PCB.
Failure to follow this guideline may result in part malfunction or damage.
Power Ground
Feedback pin for external divider option. When using the external divider option
(VS0=VS1=VS2= high) connect this pin to the center of the external divider. Set the
divider such that V
FB
= 0.6V. The “ground” side of the external divider should be
connected to AGND. This pin may be left unconnected when using Voltage Select
pins (VS0-VS2) to set the output voltage.
Sense pin for output voltage regulation. Refer to application section for proper
configuration.
Analog ground. This is the quiet ground for the internal control circuitry
Regulated Output Voltage. Refer to application section for proper layout and
decoupling.
NO CONNECT – This pin should not be electrically connected to any external signal,
voltage, or ground. This pin may be connected internally. However, this pin must be
soldered to the PCB.
4
VFB
5
6
7,8
9
VSENSE
AGND
VOUT
NC
VOUT
2
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Decemeber 11, 2017
VOUT
8
6
9
www.altera.com/enpirion
Rev G
EP5388QI
PIN
10, 11, 12
13
14
NAME
VS0,VS1,VS2
ENABLE
VIN
FUNCTION
Output voltage select. VS2=pin10 VS1=pin11, VS0=pin12. Selects one of seven
preset output voltages or choose external divider by connecting pins to logic high or
low. Refer to section on output voltage select for more detail.
Output enable. Enable = logic high, disable = logic low.
Input voltage pin. Refer to application section for proper layout and decoupling.
Functional Block Diagram
V
IN
UVLO
Thermal Limit
Current Limit
ENABLE
Soft Start
P-Drive
(-)
PWM
Comp
(+)
NC(SW)
Logic
N-Drive
V
OUT
GND
Sawtooth
Generator
Compensation
Network
V
SENSE
(-)
Error
Amp
(+)
Switch
V
FB
DAC
VREF
Voltage
Select
Package Boundry
VS0 VS1 VS2
Figure 4.
Functional block diagram
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Decemeber 11, 2017
Rev G
EP5388QI
Absolute Maximum Ratings
CAUTION:
Absolute Maximum ratings are stress ratings only. Functional operation beyond recommended operating
conditions is not implied. Stress beyond absolute maximum ratings may cause permanent damage to the device.
Exposure to absolute maximum rated conditions for extended periods may affect device reliability.
PARAMETER
Input Supply Voltage
Voltages on: ENABLE, V
SENSE
, V
S0
-V
S2
Voltage on: V
FB
Storage Temperature Range
Reflow Temp, 10 Sec, MSL3 JEDEC J-STD-020C
ESD Rating (based on Human Body Model)
SYMBOL
V
IN
MIN
-0.3
-0.3
-0.3
-65
MAX
7.0
V
IN
+ 0.3
2.7
150
260
2000
UNITS
V
V
V
°C
°C
V
T
STG
Recommended Operating Conditions
PARAMETER
Input Voltage Range
Output Voltage Range
Output Current
Operating Ambient Temperature
Operating Junction Temperature
SYMBOL
V
IN
V
OUT
I
OUT
T
A
T
J
MIN
2.4
0.603
0
-40
-40
MAX
5.5
V
IN
– 0.5
800
+85
+125
UNITS
V
V
mA
°C
°C
Thermal Characteristics
PARAMETER
Thermal Resistance: Junction to Ambient (0 LFM)
Thermal Overload Trip Point
Thermal Overload Trip Point Hysteresis
SYMBOL
θ
JA
T
J-TP
TYP
100
+150
15
UNITS
°C/W
°C
°C
Electrical Characteristics
NOTE:
T
A
= -40°C to +85°C unless otherwise noted. Typical values are at T
A
= 25°C, VIN = 3.6V. C
IN
=4.7µF 0603 MLCC,
C
OUT
= 47µF 1206 MLCC.
PARAMETER
V
OUT
Initial Accuracy
Line Regulation
Load Regulation
Temperature Variation
Overall V
OUT
Accuracy
(Line, Load, and
Temperature combined)
Dropout Resistance
Dynamic Voltage Slew
Rate
Continuous Output
Current
Shut-Down Current
PFET OCP Threshold
Feedback Pin Voltage
Feedback Pin Input
Current
VS0-VS1, Enable Voltage
Threshold
VS0-VS2 Pin Input
Current
SYMBOL
∆V
OUT_Initl
∆V
OUT_linel
∆V
OUT_load
∆V
OUT_templ
∆V
OUT_All
R
DROPOUT
V
slew
I
OUT
I
SD
I
LIM
V
FB
I
FB
V
TH
I
VSX
TEST CONDITIONS
T
A
= 25C, 2.4V
≤
V
IN
≤
5.5V
2.4V
≤
V
IN
≤
5.5V
0A
≤
I
LOAD
≤
800mA
-40°C
≤
T
A
≤
+85°C
2.4V
≤
V
IN
≤
5.5V
-40°C
≤
T
A
≤
+85°C
0A
≤
I
LOAD
≤
800mA
MIN
-2%
TYP
0.0566
0.0003
0.0078
MAX
+2%
UNITS
%/V
%/mA
%/°C
-3%
400
0.975
1.5
+3%
500
2.025
mΩ
V/ms
mA
0.75
1000
0.603
100
µA
mA
V
nA
-20°C
≤
T
A
≤
+85°C
-40°C
≤
T
A
≤
+85°C
Enable = Low
800
750
Pin = Low
Pin = High
0.0
1.4
1
0.4
V
IN
nA
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Decemeber 11, 2017
Rev G
EP5388QI
PARAMETER
Operating Frequency
PFET On Resistance
NFET On Resistance
Soft-Start Operation
Soft-Start Slew Rate
V
OUT
Rise Time
SYMBOL
TEST CONDITIONS
MIN
F
OSC
R
DS(ON)
R
DS(ON)
V
SS
T
SS
VID programming mode
VFB programming mode
0.975
0.784
TYP
4
340
270
1.5
1.2
MAX
UNITS
MHz
mΩ
mΩ
V/ms
ms
2.025
1.628
Typical Performance Characteristics
95
90
85
80
95
90
85
80
Efficiency (%)
Efficiency (%)
75
70
65
60
55
50
0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50 0.55 0.60 0.65 0.70 0.75 0.80
Load Current (A)
75
70
65
60
55
50
0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50 0.55 0.60 0.65 0.70 0.75 0.80
Load Current (A)
Efficiency,
V
IN
= 3.3V, V
OUT
= 1.2V, 1.5V,1.8V, 2.5V.
95
90
85
80
Efficiency,
V
IN
= 3.7V, V
OUT
= 1.2V, 1.5V,1.8V, 2.5V.
Efficiency (%)
75
70
65
60
55
50
0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50 0.55 0.60 0.65 0.70 0.75 0.80
Load Current (A)
Efficiency,
V
IN
= 5V, V
OUT
= 1.2V, 1.5V,1.8V, 2.5V, 3.3V.
Output Ripple,
V
IN
= 5V, V
OUT
= 1.2V; Load = 500mA.
www.altera.com/enpirion
Page 5
02377
Decemeber 11, 2017
Rev G
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