Wide Input Voltage Range, 8Amp
300kHz, Buck Regulator
FEATURES
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SP7655
TM
Power
Blox
DFN PACKAGE
7mm x 4m
m
SP7655
2.5V to 28V Step Down Achieved Using Dual Input
Output Voltage down to 0.8V
8A Output Capability
Built in Low R
DSON
Power Switches (15m typ)
Highly Integrated Design, Minimal Components
300 kHz Fixed Frequency Operation
UVLO Detects Both V
CC
and V
IN
Over Temperature Protection
Short Circuit Protection with Auto-Restart
Wide BW Amp Allows Type II or III Compensation
Programmable Soft Start
Fast Transient Response
High Efficiency: Greater than
95%Possible
Non-synchronous
Start-Up into a Pre-Charged Output
Lead Free, RoHS Compliant Package:
Small 7mm x 4mm DFN
U.S. Patent #6,922,041
P
GND
1
P
GND
2
P
GND
3
GND 4
V
FB
5
COMP 6
UVIN 7
GND 8
SS 9
V
IN
10
V
IN
11
V
IN
12
V
IN
13
Heatsink Pad 3
Connect toVIN
Heatsink Pad 2
Connect to GND
TOP VIEW
Heatsink Pad 1
Connect to Lx
26 LX
25 LX
24 LX
23 LX
2 2 V
CC
21 GND
20 GND
19 GND
18 BST
17 NC
16 LX
15 LX
14 LX
The SP7655 is a synchronous step-down switching regulator optimized for high efficiency. The part is designed to be
especially attractive for dual supply, 12V or 24V distributed power systems stepped down with 5V used to power the
controller. This lower V
CC
voltage minimizes power dissipation in the part and is used to drive the top switch. The
SP7655 is designed to provide a fully integrated buck regulator solution using a fixed 300kHz frequency, PWM voltage
mode architecture. Protection features include UVLO, thermal shutdown and output short circuit protection. The
SP7655 is available in the space saving DFN package
.
DESCRIPTION
TYPICAL APPLICATION CIRCUIT
U1
SP7655
1
PGND
PGND
PGND
GND
VFB
COMP
UVIN
GND
SS
VIN
VIN
VIN
VIN
LX
LX
LX
LX
VCC
GND
GND
GND
BST
NC
LX
LX
LX
26
25
24
23
22
21
20
19
18
17
16
15
14
L1
2.2uH, Irate=8A
CZ2
RZ2
CP1
22pF
2
3
1,000pF 15k ,1%
4
5
6
+5V
VCC
CVCC
2.2uF
C3
47uF
6.3V
RZ3
7.15k
1%
VOUT
3.30V
0-8A
68.1k ,1%
CZ3
150pF
R1
100pF
CF1
ENABLE
7
8
9
DBST
SD101AWS
6,800pF
RSET
21.5k ,1%
(note 2)
CSS
47nF
10
11
12
CBST
VIN
12V
22uF
16V
13
C1
f
s=300Khz
22uF
16V
C4
Notes:
1. U1 Bottom side layout should
have three contacts isolated from
one another: Vin, SWNODE, and GND.
2. RSET=54.48/(Vout-0.8V) KOhms
GND
Rev E: 3/2/07
SP7655 Wide Input Voltage Range 8A, 300kHz, Buck Regulator
© 2007 Sipex Corporation
ABSOLUTE MAXIMUM RATINGS
These are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the
specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability.
V
CC
.................................................................................................. 7V
V
IN ...........................................................................................................................................
30V
I
LX ............................................................................................................................................
10A
BST ............................................................................................... 35V
LX-BST ............................................................................. -0.3V to 7V
LX ....................................................................................... -1V to 30V
All other pins .......................................................... -0.3V to V
CC
+0.3V
Storage Temperature .................................................. -65°C to 150°C
Power Dissipation ...................................... Internally Limited via OTP
ESD Rating .......................................................................... 2kV HBM
Thermal Resistance
JC ....................................................................................
5°C/W
Unless otherwise specified: -40°C < T
AMB
< 85
°C,
-40°C < Tj< 125°C, 4.5V < V
CC
< 5.5V, 3V< Vin< 28V, BST=LX + 5V,
LX = GND = 0.0V, UVIN = 3.0V, CV
CC
= 1
µF,
C
COMP
= 0.1
µF,
C
SS
= 50nF, Typical measured at V
CC
= 5V.
The denotes the specifications which apply over the full temperature range, unless otherwise specified.
ELECTRICAL SPECIFICATIONS
PARAMETER
QUIESCENT CURRENT
V
CC
Supply Current (No switching)
V
CC
Supply Current (switching)
BST Supply Current (No switching)
BST Supply Current (switching)
PROTECTION: UVLO
V
CC
UVLO Start Threshold
V
CC
UVLO Hysteresis
UVIN Start Threshold
UVIN Hysteresis
UVIN Input Current
ERROR AMPLIFIER REFERENCE
Error Amplifier Reference
Error Amplifier Reference
Over Line and Temperature
Error Amplifier Transconductance
Error Amplifier Gain
COMP Sink Current
COMP Source Current
V
FB
Input Bias Current
Internal Pole
COMP Clamp
COMP Clamp Temp. Coefficient
Rev E: 3/2/07
MIN.
TYP.
MAX.
UNITS
CONDITIONS
1.5
6
0.2
5
3
9
0.4
8
mA
mA
mA
mA
♦
♦
V
FB
=0.9V
V
FB
=0.9V
4.00
100
2.3
200
4.25
200
2.5
300
4.5
300
2.65
400
1
V
mV
V
mV
µA
UVIN =3.0V
♦
0.792
0.788
0.800
0.800
6
60
150
150
50
4
2.5
-2
0.808
0.812
V
V
mA/V
dB
µA
µA
♦
2X Gain Config., Measure
VFB; V
CC
=5 V, T= 25ºC
No Load
V
FB
=0.9V, COMP=0.9V
V
FB
=0.7V, COMP=2..2V
V
FB
=0.8V
200
nA
MHz
V
mV/ºC
V
FB
=0.7V, TA=25ºC
SP7655 Wide Input Voltage Range 8A, 300kHz, Buck Regulator
© 2007 Sipex Corporation
2
Unless otherwise specified: -40°C < T
AMB
< 85
°C,
-40°C< Tj< 125°C, 4.5V < V
CC
< 5.5V, 3V< Vin< 28V, BST=LX + 5V,
LX = GND = 0.0V, UVIN = 3.0V, CV
CC
= 1
µF,
C
COMP
= 0.1
µF,
C
SS
= 50nF, Typical measured at V
CC
= 5V.
The denotes the specifications which apply over the full temperature range, unless otherwise specified.
ELECTRICAL SPECIFICATIONS
PARAMETER
MIN.
TYP.
MAX.
UNITS
CONDITIONS
CONTROL LOOP: PWM COMPARATOR, RAMP & LOOP DELAY PATH
Ramp Amplitude
RAMP Offset
RAMP Offset Temp. Coefficient
GH Minimum Pulse Width
Maximum Controllable Duty Ratio
Maximum Duty Ratio
Internal Oscillator Ratio
TIMERS: SOFTSTART
SS Charge Current:
SS Discharge Current:
PROTECTION: Short Circuit & Thermal
Short Circuit Threshold Voltage
Hiccup Timeout
Number of Allowable Clock Cycles
at 100% Duty Cycle
Minimum GL Pulse After 20 Cycles
Thermal Shutdown Temperature
Thermal Recovery Temperature
Thermal Hysteresis
OUTPUT: POWER STAGE
High Side R
DSON
Synchronous FET R
DSON
Maximum Output Current
Rev E: 3/2/07
0.92
1.1
1.1
-2
90
1.28
V
V
mV/ºC
T
A
= 25ºC, RAMP COMP
until GH starts Switching
180
ns
%
%
♦
Maximum Duty Ratio
Measured just before
pulsing begins
Valid for 20 cycles
♦
92
100
240
97
300
360
kHz
10
1
µA
mA
♦
Fault Present, SS = 0.2V
0.2
0.25
200
20
0.5
145
135
10
0.3
V
ms
Cycles
Cycles
ºC
ºC
ºC
♦
Measured V
REF
(0.8V) -
V
FB
V
FB
=0.5V
V
FB
=0.7V
V
FB
=0.7V
15
15
8
mΩ
mΩ
A
♦
♦
♦
V
CC
= 5V ; I
OUT
= 8A
T
AMB
= 25ºC
V
CC
= 5V ; I
OUT
= 8A
T
AMB
= 25ºC
SP7655 Wide Input Voltage Range 8A, 300kHz, Buck Regulator
© 2007 Sipex Corporation
3
PIN DESCRIPTION
Pin #
1-3
4,8,19-21
Pin Name
P
GND
GND
Description
Ground connection for the synchronous rectifier
Ground Pin. The control circuitry of the IC and lower power driver are
referenced to this pin. Return separately from other ground traces to the (-)
terminal of C
OUT
.
Feedback Voltage and Short Circuit Detection pin. It is the inverting input of
the Error Amplifier and serves as the output voltage feedback point for the
Buck Converter. The output voltage is sensed and can be adjusted through
an external resistor divider. Whenever V
FB
drops 0.25V below the positive
reference, a short circuit fault is detected and the IC enters hiccup mode.
Output of the Error Amplifier. It is internally connected to the inverting input of
the PWM comparator. An optimal filter combination is chosen and connected
to this pin and either ground or V
FB
to stabilize the voltage mode loop.
UVLO input for V
IN
voltage. Connect a resistor divider between V
IN
and UV
IN
to set minimum operating voltage.
Soft Start. Connect an external capacitor between SS and GND to set the
soft start rate based on the 10µA source current. The SS pin is held low via a
1mA (min) current during all fault conditions.
Input connection to the high side N-channel MOSFET. Place a decoupling
capacitor between this pin and PGND.
Connect an inductor between this pin and V
OUT
No Connect
High side driver supply pin. Connect BST to the external boost diode and
capacitor as shown in the Typical Application Circuit on page 1. High side
driver is connected between BST pin and SWN pin.
Input for external 5V bias supply
5
V
FB
6
7
9
10-13
14-16,23-26
17
18
22
COMP
UVIN
SS
V
IN
LX
NC
BST
Vcc
General Overview
THEORY OF OPERATION
The SP7655 contains two unique control fea-
tures that are very powerful in distributed appli-
cations. First, asynchronous driver control is
enabled during startup, to prohibit the low side
switch from pulling down the output until the
high side switch has attempted to turn on. Sec-
ond, a 100% duty cycle timeout ensures that the
low side switch is periodically enhanced during
extended periods at 100% duty cycle. This guar-
antees the synchronized refreshing of the BST
capacitor during very large duty cycle ratios.
The SP7655 also contains a number of valuable
protection features. Programmable V
IN
UVLO
allows the user to set the exact value at which the
conversion voltage can safely begin down con-
version, and an internal V
CC
UVLO which en-
sures that the controller itself has enough volt-
age to operate properly. Other protection fea-
© 2007 Sipex Corporation
The SP7655 is a fixed frequency, voltage mode,
synchronous PWM regulator optimized for high
efficiency. The part has been designed to be
especially attractive for high voltage applica-
tions utilizing 5V to power the controller and
2.5V to 28V for step down conversion.
The heart of the SP7655 is a wide bandwidth
transconductance amplifier designed to accom-
modate Type II and Type III compensation
schemes. A precision 0.8V reference, present on
the positive terminal of the error amplifier,
permits the programming of the output voltage
down to 0.8V via the V
FB
pin. The output of the
error amplifier, COMP, compared to a 1.1V
peak-to-peak ramp is responsible for trailing
edge PWM control. This voltage ramp, and
PWM control logic are governed by the internal
oscillator that accurately sets the PWM fre-
quency to 300kHz.
Rev E: 3/2/07
SP7655 Wide Input Voltage Range 8A, 300kHz, Buck Regulator
THEORY OF OPERATION
tures include thermal shutdown and short-cir-
cuit detection. In the event that either a thermal,
short-circuit, or UVLO fault is detected, the
SP7655 is forced into an idle state where the
output drivers are held off for a finite period
before a restart is attempted.
Soft Start
Thermal and Short-Circuit
Protection
Because the SP7655 is designed to drive large
output current, there is a chance that the power
converter will become too hot. Therefore, an
internal thermal shutdown (145°C) has been
included to prevent the IC from malfunctioning
at extreme temperatures.
A short-circuit detection comparator has also
been included in the SP7655 to protect against
an accidental short at the output of the power
converter. This comparator constantly monitors
the positive and negative terminals of the error
amplifier, and if the V
FB
pin falls more than
250mV (typical) below the positive reference, a
short-circuit fault is set. Because the SS pin
overrides the internal 0.8V reference during soft
start, the SP7655 is capable of detecting short-
circuit faults throughout the duration of soft
start as well as in regular operation.
Handling of Faults:
“Soft Start” is achieved when a power converter
ramps up the output voltage while controlling
the magnitude of the input supply source cur-
rent. In a modern step down converter, ramping
up the positive terminal of the error amplifier
controls soft start. As a result, excess source
current can be defined as the current required to
charge the output capacitor.
IV
IN
= C
OUT
* ( V
OUT
/
T
SOFT-START
)
The SP7655 provides the user with the option to
program the soft start rate by tying a capacitor
from the SS pin to GND. The selection of this
capacitor is based on the 10µA pullup current
present at the SS pin and the 0.8V reference
voltage. Therefore, the excess source can be
redefined as:
IV
IN
= C
OUT
* ( V
OUT
*10
µA
/ (C
SS
* 0.8V)
Under Voltage Lock Out (UVLO)
The SP7655 contains two separate UVLO com-
parators to monitor the bias (V
CC
) and conver-
sion (V
IN
) voltages independently. The V
CC
UVLO threshold is internally set to 4.25V,
whereas the V
IN
UVLO threshold is program-
mable through the UVIN pin. When the UVIN
pin is greater than 2.5V, the SP7655 is permitted
to start up pending the removal of all other
faults. Both the V
CC
and V
IN
UVLO compara-
tors have been designed with hysteresis to pre-
vent noise from resetting a fault.
Upon the detection of power (UVLO), thermal,
or short-circuit faults, the SP7655 is forced into
an idle state where the SS and COMP pins are
pulled low and both switches are held off. In the
event of UVLO fault, the SP7655 remains in this
idle state until the UVLO fault is removed.
Upon the detection of a thermal or short-circuit
fault, an internal 200ms timer is activated. In the
event of a short-circuit fault, a restart is at-
tempted immediately after the 200ms timeout
expires. Whereas, when a thermal fault is de-
tected, the 200ms delay continuously recycles
and a restart cannot be attempted until the ther-
mal fault is removed and the timer expires.
Error Amplifier and Voltage Loop
Since the heart of the SP7655 voltage error loop
is a high performance, wide bandwidth current-
limited (+/-150µA) transconductance ampli-
fier, there are many ways to compensate the
voltage loop or to control the COMP pin exter-
nally. If a simple, single pole, single zero
response is desired, then compensation can be
Rev E: 3/2/07
SP7655 Wide Input Voltage Range 8A, 300kHz, Buck Regulator
© 2007 Sipex Corporation
5
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