DV74LS280D datasheet, PDF - EEWORLD Datasheet

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DV74LS280D: DescriptionParity Generator/Checker, LS Series, 9-Bit, Complementary Output, TTL, PDSO14, PLASTIC, SOP-14; Categorylogic logic; File Size95KB，2 Pages; ManufacturerAVG [AVG Semiconductors(HITEK)]

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DV74LS280D Overview

Parity Generator/Checker, LS Series, 9-Bit, Complementary Output, TTL, PDSO14, PLASTIC, SOP-14

DV74LS280D Parametric

Parameter Name	Attribute value
Maker	AVG [AVG Semiconductors(HITEK)]
Parts packaging code	SOIC
package instruction	SOP,
Contacts	14
Reach Compliance Code	unknown
series	LS
JESD-30 code	R-PDSO-G14
length	8.65 mm
Logic integrated circuit type	PARITY GENERATOR/CHECKER
Number of digits	9
Number of functions	1
Number of terminals	14
Maximum operating temperature	70 °C
Minimum operating temperature	-10 °C
Output polarity	COMPLEMENTARY
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
propagation delay (tpd)	50 ns
Certification status	Not Qualified
Maximum seat height	1.75 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	TTL
Temperature level	COMMERCIAL
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
width	3.9 mm
Base Number Matches	1

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DV74LS280D Related Products

	DV74LS280D	DV74LS280N	DV74ALS280N	DV74ALS280D
Description	Parity Generator/Checker, LS Series, 9-Bit, Complementary Output, TTL, PDSO14, PLASTIC, SOP-14	Parity Generator/Checker, LS Series, 9-Bit, Complementary Output, TTL, PDIP14, PLASTIC, DIP-14	Parity Generator/Checker, ALS Series, 9-Bit, Complementary Output, TTL, PDIP14, PLASTIC, DIP-14	Parity Generator/Checker, ALS Series, 9-Bit, Complementary Output, TTL, PDSO14, PLASTIC, SOP-14
Parts packaging code	SOIC	DIP	DIP	SOIC
package instruction	SOP,	DIP,	DIP,	SOP,
Contacts	14	14	14	14
Reach Compliance Code	unknown	unknown	unknown	unknown
series	LS	LS	ALS	ALS
JESD-30 code	R-PDSO-G14	R-PDIP-T14	R-PDIP-T14	R-PDSO-G14
length	8.65 mm	18.86 mm	18.86 mm	8.65 mm
Logic integrated circuit type	PARITY GENERATOR/CHECKER	PARITY GENERATOR/CHECKER	PARITY GENERATOR/CHECKER	PARITY GENERATOR/CHECKER
Number of digits	9	9	9	9
Number of functions	1	1	1	1
Number of terminals	14	14	14	14
Maximum operating temperature	70 °C	70 °C	70 °C	70 °C
Minimum operating temperature	-10 °C	-10 °C	-10 °C	-10 °C
Output polarity	COMPLEMENTARY	COMPLEMENTARY	COMPLEMENTARY	COMPLEMENTARY
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	SOP	DIP	DIP	SOP
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE	IN-LINE	IN-LINE	SMALL OUTLINE
propagation delay (tpd)	50 ns	50 ns	20 ns	20 ns
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	1.75 mm	4.69 mm	4.69 mm	1.75 mm
Maximum supply voltage (Vsup)	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage (Vsup)	4.5 V	4.5 V	4.5 V	4.5 V
Nominal supply voltage (Vsup)	5 V	5 V	5 V	5 V
surface mount	YES	NO	NO	YES
technology	TTL	TTL	TTL	TTL
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal form	GULL WING	THROUGH-HOLE	THROUGH-HOLE	GULL WING
Terminal pitch	1.27 mm	2.54 mm	2.54 mm	1.27 mm
Terminal location	DUAL	DUAL	DUAL	DUAL
width	3.9 mm	7.62 mm	7.62 mm	3.9 mm
Base Number Matches	1	1	1	-

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