FS6500, FS4500
Rev. 1.0 — 14 December 2017
Safety Power System Basis Chip with CAN FD and LIN
Transceivers
Short data sheet: advance information
1
General description
The FS6500/FS4500 SMARTMOS devices are a multi-output, power supply, integrated
circuit, including CAN Flexible Data (FD) and/or LIN transceivers, dedicated to the
automotive market.
Multiple switching and linear voltage regulators, including low-power mode (32 μA) are
available with various wake-up capabilities. An advanced power management scheme
is implemented to maintain high efficiency over a wide range of input voltages (down to
2.7 V) and output current ranges (up to 2.2 A).
The FS6500/FS4500 includes configurable fail-safe/fail silent safety behavior and
features, with two fail-safe outputs, becoming a full part of a safety oriented system
partitioning, to reach a high integrity safety level (up to ASIL D).
The built-in CAN FD interface fulfills the ISO 11898-2 and -5 standards. The LIN interface
fulfills LIN protocol specifications 2.0, 2.1, 2.2, and SAEJ2602-2.
2
Features
•
Battery voltage sensing and MUX output pin
•
Highly flexible SMPS pre-regulator, allowing two topologies: non-inverting buck-boost
and standard buck
•
Family of devices to supply MCU core from 1.0 V to 5.0 V, with SMPS (0.8 A, 1.5 A or
2.2 A) or LDO (0.5 A)
•
36 V maximum input operating voltage
•
Linear voltage regulator dedicated to auxiliary functions, or to sensor supply (V
CCA
tracker or independent), 5.0 V or 3.3 V
•
Linear voltage regulator dedicated to MCU A/D reference voltage or I/Os supply (V
CCA
),
5.0 V or 3.3 V
•
3.3 V keep alive memory supply available in low-power mode
•
Long duration timer, counting up to 6 months with 1.0 s resolution
•
Multiple wake-up sources in low-power mode: CAN, LIN, IOs, LDT
•
Five configurable I/Os
3
Applications
•
•
•
•
Drive train electrification (BMS, hybrid EV and HEV, inverter, DCDC, alterno starter)
Drive train - chassis and safety (active suspension, steering, safety domain gateway)
Power train (EMS, TCU, gear box)
ADAS (LDW, Radar, sensor fusion safety area)
NXP Semiconductors
Safety Power System Basis Chip with CAN FD and LIN Transceivers
FS6500, FS4500
4
Simplified application diagram
Figure 1. FS6500C simplified application diagram - buck boost configuration - FS1B
+Battery
(KL30)
V
PRE
V
CORE
VDD
VCORE_SNS
FB_CORE
V
PRE
VSUP3
VSENSE
VAUX_E
VAUX_B
V
AUX
VAUX
SELECT
V
PRE
DEBUG
mode
CAN-5V
DEBUG
VSUP2
VSUP1
BOOT_PRE
SW_PRE2
SW_PRE1
BOOT_CORE
SW_CORE
VPRE
GATE_LS
MCU
COMP_CORE
FCRBM
VCCA_E
VCCA_B
VCCA
VDDIO
MUX_OUT
IO_5/VKAM
MOSI
MISO
SCLK
NCS
INTB
V
CCA
V
CORE
or
V
CCA
FS6500L
AD ref.
voltage
ADC Input
Vstandby
SPI
NMI
V
DDIO
Reset
CAN
LIN
V
DDIO
FCCU
Ignition Key
(KL15)
To switch
CAN BUS
VSUP3
LIN BUS
V
DDIO
Fail-safe Drive
IO_0
IO_4
CANH
CANL
RSTB
TXD
RXD
LIN
TXDL
RXDL
IO_3
IO_2
FS0B
GNDA
GND_COM
DGND
Figure 2. FS6500L simplified application diagram - buck configuration - LIN - V
CCA
=100 mA
FS6500-FS4500SDS
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2017. All rights reserved.
Short data sheet: advance information
Rev. 1.0 — 14 December 2017
2 / 20
NXP Semiconductors
Safety Power System Basis Chip with CAN FD and LIN Transceivers
FS6500, FS4500
Figure 3. FS4500C simplified application diagram - buck boost configuration - FS1B
5
Ordering information
5.1 Part numbers definition
MC33FS c 5 x y z AE/R2
Table 1. Part number breakdown
Code
c
x
Option
4 series
6 series
0
1
2
y
0
1
2
3
4
z
N
C
L
FS6500-FS4500SDS
All information provided in this document is subject to legal disclaimers.
Variable
V
CORE
type
Description
Linear
DCDC
0.5 A or 0.8 A
1.5 A
2.2 A
none
FS1B
V
CORE
current
Functions
LDT
FS1B, LDT
LDT, VKAM ON by default
none
Physical interface
CAN FD
CAN FD and LIN
© NXP B.V. 2017. All rights reserved.
Short data sheet: advance information
Rev. 1.0 — 14 December 2017
3 / 20
NXP Semiconductors
Safety Power System Basis Chip with CAN FD and LIN Transceivers
FS6500, FS4500
5.2 Part numbers list
Table 2. Orderable part variations
Part number
MC33FS4500CAE
MC33FS4500LAE
MC33FS4500NAE
MC33FS4501CAE
MC33FS4501NAE
MC33FS4502CAE
MC33FS4502LAE
MC33FS4502NAE
MC33FS4503CAE
MC33FS4503NAE
MC33FS6500CAE
MC33FS6500LAE
MC33FS6500NAE
MC33FS6501CAE
MC33FS6501NAE
MC33FS6502CAE
MC33FS6502LAE
MC33FS6502NAE
MC33FS6503CAE
MC33FS6503NAE
MC33FS6504LAE
MC33FS6510CAE
MC33FS6510LAE
MC33FS6510NAE
MC33FS6511CAE
MC33FS6511NAE
MC33FS6512CAE
MC33FS6512LAE
MC33FS6512NAE
MC33FS6513CAE
MC33FS6513NAE
MC33FS6514LAE
MC33FS6520CAE
MC33FS6520LAE
MC33FS6520NAE
MC33FS6521CAE
MC33FS6521NAE
MC33FS6522CAE
MC33FS6522LAE
MC33FS6522NAE
MC33FS6523CAE
MC33FS6523NAE
–40 °C to 125 °C
48-pin LQFP
exposed pad
Temperature
(T
A
)
Package
FS1B
0
0
0
1
1
0
0
0
1
1
0
0
0
1
1
0
0
0
1
1
0
0
0
0
1
1
0
0
0
1
1
0
0
0
0
1
1
0
0
0
1
1
LDT
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
1
1
1
1
1
VCORE
0.5 A
0.5 A
0.5 A
0.5 A
0.5 A
0.5 A
0.5 A
0.5 A
0.5 A
0.5 A
0.8 A
0.8 A
0.8 A
0.8 A
0.8 A
0.8 A
0.8 A
0.8 A
0.8 A
0.8 A
0.8 A
1.5 A
1.5 A
1.5 A
1.5 A
1.5 A
1.5 A
1.5 A
1.5 A
1.5 A
1.5 A
1.5 A
2.2 A
2.2 A
2.2 A
2.2 A
2.2 A
2.2 A
2.2 A
2.2 A
2.2 A
2.2 A
VCORE
type
Linear
Linear
Linear
Linear
Linear
Linear
Linear
Linear
Linear
Linear
DC DC
DC DC
DC DC
DC DC
DC DC
DC DC
DC DC
DC DC
DC DC
DC DC
DC DC
DC DC
DC DC
DC DC
DC DC
DC DC
DC DC
DC DC
DC DC
DC DC
DC DC
DC DC
DC DC
DC DC
DC DC
DC DC
DC DC
DC DC
DC DC
DC DC
DC DC
DC DC
VKAM on
by SPI
by SPI
by SPI
by SPI
by SPI
by SPI
by SPI
by SPI
by SPI
by SPI
by SPI
by SPI
by SPI
by SPI
by SPI
by SPI
by SPI
by SPI
by SPI
by SPI
by default
by SPI
by SPI
by SPI
by SPI
by SPI
by SPI
by SPI
by SPI
by SPI
by SPI
by default
by SPI
by SPI
by SPI
by SPI
by SPI
by SPI
by SPI
by SPI
by SPI
by SPI
CAN FD
1
1
0
1
0
1
1
0
1
0
1
1
0
1
0
1
1
0
1
0
1
1
1
0
1
0
1
1
0
1
0
1
1
1
0
1
0
1
1
0
1
0
LIN
0
1
0
0
0
0
1
0
0
0
0
1
0
0
0
0
1
0
0
0
1
0
1
0
0
0
0
1
0
0
0
1
0
1
0
0
0
0
1
0
0
0
[1] [2]
Notes
[1]
[2]
To order parts in tape and reel, add the R2 suffix to the part number.
LIN and FS1B functions are exclusive. The differentiation is made by part numbers. When LIN is available, FS1B is not, and vice versa. VKAM on by
default is available on certain part numbers only.
FS6500-FS4500SDS
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2017. All rights reserved.
Short data sheet: advance information
Rev. 1.0 — 14 December 2017
4 / 20
NXP Semiconductors
Safety Power System Basis Chip with CAN FD and LIN Transceivers
FS6500, FS4500
6
Block diagram
BOOT_CORE
COMP_CORE
VCORE_SNS
FB_CORE
BOOT_PRE
SW_CORE
SW_PRE2
SW_PRE1
GATE_LS
VSUP2
VSUP1
DGND
VPRE
V
PRE
TSD
V
PRE
SMPS
TSD
V
CORE
SMPS
VAUX_E
VAUX_B
VAUX
V
PRE
TSD
V
AUX
Linear Regulator
V
PRE
V
PRE
TSD
V
CCA
Linear Regulator
V
REF
V
SENSE
(2.5 V)
Die
Temp
VCCA_E
VCCA_B
VCCA
GNDA
MUX_OUT
CAN-5V
TSD
V
CAN
Linear Regulator
V
SUP3
V
PRE
V
PRE
Analog
Reference #1
Charge Pump
MUX
Interface
IO_0
VKAM
SELECT
IO_0
IO_2
IO_3
IO_4
IO_5/VKAM
*
I/Os
Interface
V
SUP3
Select
VKAM
5
V2p5d
Main
Power Management
State Machine
OSC
Main
DEBUG
Debug
SPI
Main
MISO FS
INTB
NCS
SCLK
MOSI
MISO
VDDIO
CAN/LIN diag
V
SENSE_MON
V
SUP_MON
V
SUP3
CAN-5V V
AUX
V
CCA
FB
_CORE
V
PRE
Long *
Duration
Timer
Select
Debug
V2p5d
FS
Voltage Regulator
SUPERVISOR
(Over & undervoltage
)
5
SPI
FS
VSENSE
FCRBM
Analog Reference #2
FS
V
PRE
V
SUP3
OSC
FS
Fail -safe Machine
V
SUP3
V
PRE
RSTB
FS0B
FS1B
VPU_FS
RXD
TXD
RXDL
TXDL
FS1B delay *
& driver
CAN-5V
CANH
CANL
GND_COM
LIN
Fail-safe logic & supply
CAN Flexible Data Interface *
LIN Interface *
Part Number dependent
*
Figure 4. FS6500/FS4500 with CAN and LIN simplified internal block diagram
FS6500-FS4500SDS
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2017. All rights reserved.
Short data sheet: advance information
Rev. 1.0 — 14 December 2017
5 / 20
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