DDR-SDRAM T
ermination Regulator
BD3531F
●Dimension
(Unit : mm)
●Description
BD3531F is a regulator developed as termination
power supply of standard DDR-SDRAM that is
used for PC.
Industry's highest speed of transient response
characteristic is realized. The built-in FET can sink
and source load current of 1.5A(max.)
Waveform quality when data is transferred at high
speed can't be deteriorated.
BD3531F meets the bus line standards SSTL-2 of
DDR-SDRAM.
High-reliability can be realized for any applications
using DDR-SDRAM.
●Features
1)
2)
3)
4)
5)
6)
Built-in push-pull regulator for termination(VTT)
Built-in reference voltage circuit(VREF)
Built-in enable function
Built-in under voltage lock out circuit
Package SOP8
Built-in thermal shut down circuit
5.0±0.2
8
5
6.2±0.3
4.4±0.2
1
4
0.15±0.1
0.1
1.5±0.1
0.11
1.27
0.4±0.1
SOP8
●Applications
Note personal computer, Desktop personal computer
●Absolute
Maximum Ratings(Ta=25˚C)
Parameter
Input voltage
Termination input voltage
VDDQ reference voltage
Power dissipation 1
Power dissipation 2
Operating temperature range
Storage temperature range
Symbol
VCC
VTT_IN
VDDQ
Pd1
Pd 2
Topr
Tstg
-10
Limits
7
7
7
560
690
∼
*1
*1
*1
*2
*3
Unit
V
V
V
mW
mW
+
100
-55
∼
+
150
˚C
˚C
*1
Should not exceed Pd.
*2
Reduced by 4.48mW for each increase in Ta of 1˚C over 25˚C(With no heat sink).
*3
Reduced by 5.52mW for each increase in Ta of 1˚C over 25˚C(PCB(70mm×70mm×1.6mm)glass epoxy mounting.)
0.3Min.
●Recommended
Operating Conditions(Ta=25˚C)
Parameter
Input voltage
Termination input voltage
Symbol
VCC
VTT_IN
Min.
4.5
1.7
Typ.
-
-
Max.
5.5
2.6
Unit
V
V
*This product is designed for protection against radioactive rays.
●
Electrical characteristics (Unless otherwise noted, Ta=25˚C
, VCC=5V, VEN=3V, VDDQ=2.5V, VTT_IN=2.5V)
Parameter
Standby current
Bias current
<Termination>
Termination voltage
Source current
Sink current
Upper side ON resistance
Lower side ON resistance
<Reference voltage>
Output voltage
Source current
Sink current
<UVLO>
UVLO OFF voltage
Hysteresis voltage
*Design
Guarantee
Symbol
IST
ICC
VTT
ITT+
ITT-
HRON
LRON
VREF
IREF+
IREF-
VUVLO
ΔVUVLO
Min.
-
-
VREF-30mV
1.5
-
-
-
1/2×
VDDQ-50mV
Typ.
0.8
2
VREF
-
-
0.4
0.4
1/2×
VDDQ
Max.
1.6
4
VREF+30mV
-
-1.5
0.8
0.8
1/2×
VDDQ+50mV
Unit
mA
mA
V
A
A
Ω
Ω
V
mA
mA
V
mV
VEN=0V
Conditions
Io=-3A to 3A, Ta=0℃ to 100℃
*
IREF=-10mA to 10mA
Ta=0℃ to 100℃
*
10
-
4.2
100
20
-20
4.35
160
-
-10
4.5
220
VCC : Sweep up
VCC : Sweep down
●Application
Circuit
VCC
VDDQ
VTT_IN
VCC
VCC
-
VDDQ
50kΩ
UVLO
VCC
VCC
VTT_IN
Thermal
Protection
TSD
Enable
EN
+
Reference
Block
50kΩ
UVLO
Liner
N-MOS
Driver
VTT
VTT
TSD
EN
UVLO
VTTS
VREF
1/2×
VDDQ
BD3531F
GND