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MT58L128L32D1F-10IT

Description
Standard SRAM, 128KX32, 5ns, CMOS, PBGA165, FBGA-165
Categorystorage    storage   
File Size593KB,31 Pages
ManufacturerMicron Technology
Websitehttp://www.mdtic.com.tw/
Download Datasheet Parametric View All

MT58L128L32D1F-10IT Overview

Standard SRAM, 128KX32, 5ns, CMOS, PBGA165, FBGA-165

MT58L128L32D1F-10IT Parametric

Parameter NameAttribute value
Parts packaging codeBGA
package instructionFBGA-165
Contacts165
Reach Compliance Codeunknow
ECCN code3A991.B.2.A
Maximum access time5 ns
JESD-30 codeR-PBGA-B165
JESD-609 codee1
length15 mm
memory density4194304 bi
Memory IC TypeSTANDARD SRAM
memory width32
Number of functions1
Number of terminals165
word count131072 words
character code128000
Operating modeSYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize128KX32
Package body materialPLASTIC/EPOXY
encapsulated codeTBGA
Package shapeRECTANGULAR
Package formGRID ARRAY, THIN PROFILE
Parallel/SerialPARALLEL
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3.135 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTIN SILVER COPPER
Terminal formBALL
Terminal pitch1 mm
Terminal locationBOTTOM
width13 mm
Base Number Matches1
PRELIMINARY
4Mb: 256K x 18, 128K x 32/36
3.3V I/O PIPELINED, DCD SYNCBURST SRAM
4Mb SYNCBURST
SRAM
FEATURES
• Fast clock and OE# access times
• Single +3.3V +0.3V/-0.165V power supply (V
DD
)
• Separate +3.3V isolated output buffer supply
(V
DD
Q)
• SNOOZE MODE for reduced-power standby
• Common data inputs and data outputs
• Individual BYTE WRITE control and GLOBAL
WRITE
• Three chip enables for simple depth expansion and
address pipelining
• Clock-controlled and registered addresses, data
I/Os and control signals
• Internally self-timed WRITE cycle
• Burst control pin (interleaved or linear burst)
• Automatic power-down for portable applications
• 165-pin FBGA package
• 100-pin TQFP package
• 119-pin BGA package
• Low capacitive bus loading
• x18, x32, and x36 versions available
MT58L256L18D1, MT58L128L32D1,
MT58L128L36D1
3.3V V
DD
, 3.3V I/O, Pipelined, Double-
Cycle Deselect
100-Pin TQFP
1
165-Pin FBGA
(Preliminary Package Data)
OPTIONS
• Timing (Access/Cycle/MHz)
3.5ns/6ns/166 MHz
4.0ns/7.5ns/133 MHz
5ns/10ns/100 MHz
• Configurations
256K x 18
128K x 32
128K x 36
• Packages
100-pin TQFP
165-pin FBGA
119-pin, 14mm x 22mm BGA
• Operating Temperature Range
Commercial (0°C to +70°C)
Industrial (-40°C to +85°C)**
Part Number Example:
MARKING*
-6
-7.5
-10
MT58L256L18D1
MT58L128L32D1
MT58L128L36D1
T
F
B
None
IT
119-Pin BGA
2
MT58L256L18D1T-6
* A Part Marking Guide for the FBGA devices can be found on Micron’s
web site—http://www.micron.com/support/index.html.
** Industrial temperature range offered in specific speed grades and
confgurations. Contact factory for more information.
NOTE:
1. JEDEC-standard MS-026 BHA (LQFP).
2. JEDEC-standard MS-028 BHA (PBGA).
4Mb: 256K x 18, 128K x 32/36 3.3V I/O Pipelined, DCD SyncBurst SRAM
MT58L256L18D1_C.p65 – Rev. 6/01
1
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2001, Micron Technology, Inc.
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