5962F9671801VRX datasheet, PDF

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5962F9671801VRX: DescriptionACT SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, CDIP20, SIDE BRAZED, CERAMIC, DIP-20; Categorylogic logic; File Size47KB，3 Pages; ManufacturerRenesas Electronics Corporation; Websitehttps://www.renesas.com/

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5962F9671801VRX Overview

ACT SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, CDIP20, SIDE BRAZED, CERAMIC, DIP-20

5962F9671801VRX Parametric

Parameter Name	Attribute value
Parts packaging code	DIP
package instruction	DIP,
Contacts	20
Reach Compliance Code	unknown
series	ACT
JESD-30 code	R-CDIP-T20
JESD-609 code	e4
Logic integrated circuit type	BUS DRIVER
Number of digits	4
Number of functions	2
Number of ports	2
Number of terminals	20
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Output characteristics	3-STATE
Output polarity	TRUE
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DIP
Package shape	RECTANGULAR
Package form	IN-LINE
Certification status	Not Qualified
Filter level	MIL-PRF-38535 Class V
Maximum seat height	5.08 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal surface	GOLD
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
total dose	300k Rad(Si) V
width	7.62 mm
Base Number Matches	1

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ACTS244MS

January 1996

Radiation Hardened Octal

Non-Inverting Three-State Buffer

Pinouts

20 PIN CERAMIC DUAL-IN-LINE

MIL-STD-1835 DESIGNATOR CDIP2-T20,

LEAD FINISH C

TOP VIEW

20 VCC

19 BE

18 AO1

17 BI4

16 AO2

15 BI3

14 AO3

13 BI2

12 AO4

11 BI1

Features

• Devices QML Qualiﬁed in Accordance with MIL-PRF-38535

• Detailed Electrical and Screening Requirements are Contained in

SMD# 5962-96718 and Intersil’s QM Plan

• 1.25 Micron Radiation Hardened SOS CMOS

• Total Dose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >300K RAD (Si)

• Single Event Upset (SEU) Immunity: <1 x 10

-10

Errors/Bit/Day

(Typ)

• SEU LET Threshold . . . . . . . . . . . . . . . . . . . . . . . >100 MEV-cm

/mg

• Dose Rate Upset . . . . . . . . . . . . . . . . >10

RAD (Si)/s, 20ns Pulse

• Dose Rate Survivability . . . . . . . . . . . >10

• Latch-Up Free Under Any Conditions

• Military Temperature Range . . . . . . . . . . . . . . . . . . -55

C to +125

• Signiﬁcant Power Reduction Compared to ALSTTL Logic

• DC Operating Voltage Range . . . . . . . . . . . . . . . . . . . . 4.5V to 5.5V

• Input Logic Levels

- VIL = 0.8V Max

- VIH = VCC/2 Min

• Input Current

≤

1µA at VOL, VOH

• Fast Propagation Delay . . . . . . . . . . . . . . . 14.5ns (Max), 10ns (Typ)

AI1

BO4

AI2

BO3

AI3

BO2

AI4

BO1

RAD (Si)/s, 20ns Pulse

GND 10

20 PIN CERAMIC FLATPACK

MIL-STD-1835 DESIGNATOR CDFP4-F20,

LEAD FINISH C

TOP VIEW

AI1

BO4

AI2

BO3

AI3

BO2

AI4

BO1

GND

VCC

AO1

BI4

AO2

BI3

AO3

BI2

AO4

BI1

Description

The Intersil ACTS244MS is a Radiation Hardened Octal Non-Inverting

Three-State Buffer having two active low enable inputs.

The ACTS244MS utilizes advanced CMOS/SOS technology to achieve

high-speed operation. This device is a member of radiation hardened,

high-speed, CMOS/SOS Logic Family.

The ACTS244MS is supplied in a 20 lead Ceramic Flatpack (K sufﬁx) or

a Dual-In-Line Ceramic Package (D sufﬁx).

Ordering Information

PART NUMBER

5962F9671801VRC

5962F9671801VXC

ACTS244D/Sample

ACTS244K/Sample

ACTS244HMSR

TEMPERATURE RANGE

-55

C to +125

-55

C to +125

SCREENING LEVEL

MIL-PRF-38535 Class V

Sample

Die

PACKAGE

20 Lead SBDIP

20 Lead Ceramic Flatpack

20 Lead SBDIP

20 Lead Ceramic Flatpack

Die

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

http://www.intersil.com or 407-727-9207

Intersil Corporation 1999

Spec Number

File Number

518784

3187.1

5962F9671801VRX Related Products

	5962F9671801VRX	5962F9671801VXX	ACTS244D/SAMPLE	ACTS244K/SAMPLE
Description	ACT SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, CDIP20, SIDE BRAZED, CERAMIC, DIP-20	ACT SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, CDFP20, CERAMIC, DFP-20	ACT SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, CDIP20	ACT SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, CDFP20, CERAMIC, DFP-20
Parts packaging code	DIP	DFP	DIP	DFP
package instruction	DIP,	DFP,	DIP,	DFP,
Contacts	20	20	20	20
Reach Compliance Code	unknown	unknow	unknown	unknown
series	ACT	ACT	ACT	ACT
JESD-30 code	R-CDIP-T20	R-CDFP-F20	R-CDIP-T20	R-CDFP-F20
Logic integrated circuit type	BUS DRIVER	BUS DRIVER	BUS DRIVER	BUS DRIVER
Number of digits	4	4	4	4
Number of functions	2	2	2	2
Number of ports	2	2	2	2
Number of terminals	20	20	20	20
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE
Output polarity	TRUE	TRUE	TRUE	TRUE
Package body material	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DIP	DFP	DIP	DFP
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	IN-LINE	FLATPACK	IN-LINE	FLATPACK
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	5.08 mm	2.92 mm	5.08 mm	2.92 mm
Maximum supply voltage (Vsup)	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage (Vsup)	4.5 V	4.5 V	4.5 V	4.5 V
Nominal supply voltage (Vsup)	5 V	5 V	5 V	5 V
surface mount	NO	YES	NO	YES
technology	CMOS	CMOS	CMOS	CMOS
Terminal form	THROUGH-HOLE	FLAT	THROUGH-HOLE	FLAT
Terminal pitch	2.54 mm	1.27 mm	2.54 mm	1.27 mm
Terminal location	DUAL	DUAL	DUAL	DUAL
width	7.62 mm	6.92 mm	7.62 mm	6.92 mm
Base Number Matches	1	1	1	-

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