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MC74VHC1GU04DTT1

Description
Unbuffered Inverter
Categorylogic    logic   
File Size148KB,4 Pages
ManufacturerLRC
Websitehttp://www.lrc.cn
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MC74VHC1GU04DTT1 Overview

Unbuffered Inverter

MC74VHC1GU04DTT1 Parametric

Parameter NameAttribute value
MakerLRC
package instructionSOP, TSOP5/6,.11,37
Reach Compliance Codeunknow
seriesAHC/VHC/H/U/V
JESD-30 codeR-PDSO-G5
Logic integrated circuit typeINVERTER
MaximumI(ol)0.008 A
Number of functions1
Number of entries1
Number of terminals5
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeTSOP5/6,.11,37
Package shapeRECTANGULAR
Package formSMALL OUTLINE
method of packingTAPE AND REEL
power supply2/5.5 V
Prop。Delay @ Nom-Su9.5 ns
propagation delay (tpd)15.5 ns
Certification statusNot Qualified
Schmitt triggerNO
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)2 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelMILITARY
Terminal formGULL WING
Terminal pitch0.95 mm
Terminal locationDUAL
LESHAN RADIO COMPANY, LTD.
Unbuffered Inverter
MC74VHC1GU04
The MC74VHC1GU04 is an advanced high speed CMOS Unbuffered inverter fabricated with silicon gate CMOS technology. It
achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation.
This device consists of a single unbuffered inverter. In combination with others, or in the MC74VHCU04 Hex Unbuffered Inverter,
these devices are well suited for use as oscillators, pulse shapers, and in many other applications requiring a high–input impedance
amplifier. For digital applications, the MC74VHC1G04 or the MC74VHC04 are recommended.
The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output.
The MC74VHC1GU04 input structure provides protection when voltages up to 7 V are applied, regardless of the supply voltage. This
allows the MC74VHC1GU04 to be used to interface 5 V circuits to 3 V circuits.
• High Speed: t
PD
= 2.5 ns (Typ) at V
CC
= 5 V
• Low Power Dissipation: I
CC
= 2 mA (Max) at T
A
= 25°C
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
• Pin and Function Compatible with Other Standard Logic Families
• Chip Complexity: FETs = 105; Equivalent Gates = 26
MARKING DIAGRAMS
5
4
1
2
3
V6
d
SC–70/SC–88A/SOT–353
DF SUFFIX
CASE 419A
Pin 1
d = Date Code
4
5
Figure 1. Pinout
(Top View)
1
2
3
V6
d
Figure 2. Logic Symbol
Pin 1
d = Date Code
SOT–23/TSOP–5/SC–59
DT SUFFIX
CASE 483
FUNCTION TABLE
PIN ASSIGNMENT
1
2
3
4
5
NC
IN A
GND
OUT Y
V
CC
Inputs
A
L
H
Output
Y
H
L
ORDERING INFORMATION
See detailed ordering and shipping information in the
package dimensions section on page 4 of this data sheet.
VHU4–1/4

MC74VHC1GU04DTT1 Related Products

MC74VHC1GU04DTT1 MC74VHC1GU04DFT2 MC74VHC1GU04DTT3 MC74VHC1GU04DFT4 MC74VHC1GU04DFT1
Description Unbuffered Inverter Unbuffered Inverter Unbuffered Inverter Unbuffered Inverter Unbuffered Inverter
Maker LRC LRC LRC LRC LRC
package instruction SOP, TSOP5/6,.11,37 SOP, TSSOP5/6,.08 SOP, TSOP5/6,.11,37 SOP, TSSOP5/6,.08 SOP, TSSOP5/6,.08
Reach Compliance Code unknow unknow unknow unknow unknow
series AHC/VHC/H/U/V AHC/VHC/H/U/V AHC/VHC/H/U/V AHC/VHC/H/U/V AHC/VHC/H/U/V
JESD-30 code R-PDSO-G5 R-PDSO-G5 R-PDSO-G5 R-PDSO-G5 R-PDSO-G5
Logic integrated circuit type INVERTER INVERTER INVERTER INVERTER INVERTER
MaximumI(ol) 0.008 A 0.008 A 0.008 A 0.008 A 0.008 A
Number of functions 1 1 1 1 1
Number of entries 1 1 1 1 1
Number of terminals 5 5 5 5 5
Maximum operating temperature 125 °C 125 °C 125 °C 125 °C 125 °C
Minimum operating temperature -55 °C -55 °C -55 °C -55 °C -55 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code SOP SOP SOP SOP SOP
Encapsulate equivalent code TSOP5/6,.11,37 TSSOP5/6,.08 TSOP5/6,.11,37 TSSOP5/6,.08 TSSOP5/6,.08
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE
method of packing TAPE AND REEL TAPE AND REEL TAPE AND REEL TAPE AND REEL TAPE AND REEL
power supply 2/5.5 V 2/5.5 V 2/5.5 V 2/5.5 V 2/5.5 V
Prop。Delay @ Nom-Su 9.5 ns 9.5 ns 9.5 ns 9.5 ns 9.5 ns
propagation delay (tpd) 15.5 ns 15.5 ns 15.5 ns 15.5 ns 15.5 ns
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
Schmitt trigger NO NO NO NO NO
Maximum supply voltage (Vsup) 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V
Minimum supply voltage (Vsup) 2 V 2 V 2 V 2 V 2 V
Nominal supply voltage (Vsup) 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V
surface mount YES YES YES YES YES
technology CMOS CMOS CMOS CMOS CMOS
Temperature level MILITARY MILITARY MILITARY MILITARY MILITARY
Terminal form GULL WING GULL WING GULL WING GULL WING GULL WING
Terminal pitch 0.95 mm 0.635 mm 0.95 mm 0.635 mm 0.635 mm
Terminal location DUAL DUAL DUAL DUAL DUAL
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