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MC74LVX573

Description
LOW-VOLTAGE CMOS
File Size97KB,7 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
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MC74LVX573 Overview

LOW-VOLTAGE CMOS

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Octal D-Type Latch
with 3-State Outputs
With 5V-Tolerant Inputs
The MC74LVX573 is an advanced high speed CMOS octal latch with
3–state outputs. The inputs tolerate voltages up to 7V, allowing the
interface of 5V systems to 3V systems.
This 8–bit D–type latch is controlled by a latch enable input and an
output enable input. When the output enable input is high, the eight
outputs are in a high impedance state.
MC74LVX573
LOW–VOLTAGE CMOS
LVX
DW SUFFIX
20–LEAD SOIC PACKAGE
CASE 751D–04
DT SUFFIX
20–LEAD TSSOP PACKAGE
CASE 948E–02
High Speed: tPD = 6.4ns (Typ) at VCC = 3.3V
Low Power Dissipation: ICC = 4µA (Max) at TA = 25°C
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Low Noise: VOLP = 0.8V (Max)
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300mA
ESD Performance: HBM > 2000V; Machine Model > 200V
VCC
20
O0
19
O1
18
O2
17
O3
16
O4
15
O5
14
O6
13
O7
12
LE
11
M SUFFIX
20–LEAD SOIC EIAJ PACKAGE
CASE 967–01
1
OE
2
D0
3
D1
4
D2
5
D3
6
D4
7
D5
8
D6
9
D7
10
GND
PIN NAMES
Pins
OE
LE
D0–D7
O0–O7
Function
Output Enable Input
Latch Enable Input
Data Inputs
3–State Latch Outputs
Figure 1. 20–Lead Pinout
(Top View)
6/97
©
Motorola, Inc. 1997
1
REV 0

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